From patchwork Fri Jul 28 08:36:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?S=C3=A9bastien_Szymanski?= X-Patchwork-Id: 9868145 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C22F8603F9 for ; Fri, 28 Jul 2017 08:31:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B2175288AA for ; Fri, 28 Jul 2017 08:31:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A6E42288B4; Fri, 28 Jul 2017 08:31:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D5C6B288AA for ; Fri, 28 Jul 2017 08:31:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=5Lq346UbPM1P9CdiBiReq4a2CNYS+93YsHSs8gkgjwo=; b=T7DGFdXhmTg9V+ O1NLM6SYyRXdQSskzkG3HfXz2nBvMtVelYrviinsHj2FTy2dcm5oNlS/qX0i/HreD6U55ztCcToJV iGK9m+rPfSFgbq4N2gvqDYAHfCDClO2Ju2I8j+Jkr7VL9EC/sEpVKSbSUymCkEGL0+4CChctw3i74 nzqIge1+WzTwFVfL3Ydck+22BdwJfDs89kRdwvxyBqA35LyJwXoLdzTt/i6AuIzUnoY7RdW6BmucC Ra+NkQXMBrsjY424LYNdj1coDX/cNR4lv4/+jNaNzQFTRkTgqiMlQtfe7SIz3pgoJN9fjcVXvqxBf tPfvMg2FKeTz24K7CZ8w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1db0fl-0004yT-0V; Fri, 28 Jul 2017 08:31:01 +0000 Received: from 6.mo69.mail-out.ovh.net ([46.105.50.107]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1db0fi-0004xb-0J for linux-arm-kernel@lists.infradead.org; Fri, 28 Jul 2017 08:31:00 +0000 Received: from player699.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo69.mail-out.ovh.net (Postfix) with ESMTP id 74A2931E46 for ; Fri, 28 Jul 2017 10:30:30 +0200 (CEST) Received: from localhost.localdomain (124.149.193.77.rev.sfr.net [77.193.149.124]) (Authenticated sender: sebastien.szymanski@armadeus.com) by player699.ha.ovh.net (Postfix) with ESMTPSA id 2ADBE240084; Fri, 28 Jul 2017 10:30:19 +0200 (CEST) From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?= To: linux-kernel@vger.kernel.org Subject: [PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz Date: Fri, 28 Jul 2017 10:36:33 +0200 Message-Id: <1501230993-15812-1-git-send-email-sebastien.szymanski@armadeus.com> X-Mailer: git-send-email 2.7.3 MIME-Version: 1.0 X-Ovh-Tracer-Id: 17736582709937198103 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelkedriedugddtvdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170728_013058_187697_776C8B42 X-CRM114-Status: GOOD ( 10.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pm@vger.kernel.org, Viresh Kumar , "Rafael J. Wysocki" , Julien Boibessot , Fabio Estevam , Shawn Guo , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Setting the frequency higher than 528Mhz actually sets the ARM clock to 528MHz. That's because PLL2 is used as the root clock when the frequency is higher than 396MHz. cpupower frequency-set -f 792000 arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz. [ 61.606383] cpu cpu0: 396 MHz, 1025 mV --> 792 MHz, 1225 mV pll2 1 1 528000000 0 0 pll2_bypass 1 1 528000000 0 0 pll2_bus 3 3 528000000 0 0 ca7_secondary_sel 1 1 528000000 0 0 step 1 1 528000000 0 0 pll1_sw 1 1 528000000 0 0 arm 1 1 528000000 0 0 Fixes this by using the PLL1 as the root clock when the frequency is higher than 528MHz. cpupower frequency-set -f 792000 arm_clk_root on the CCM_CLKO2 signal is now 792MHz as expected. [ 69.717987] cpu cpu0: 198 MHz, 950 mV --> 792 MHz, 1225 mV pll1 1 1 792000000 0 0 pll1_bypass 1 1 792000000 0 0 pll1_sys 1 1 792000000 0 0 pll1_sw 1 1 792000000 0 0 arm 1 1 792000000 0 0 Signed-off-by: Sébastien Szymanski Acked-by: Viresh Kumar --- drivers/cpufreq/imx6q-cpufreq.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index b6edd3c..e5fba50 100644 --- a/drivers/cpufreq/imx6q-cpufreq.c +++ b/drivers/cpufreq/imx6q-cpufreq.c @@ -18,6 +18,7 @@ #define PU_SOC_VOLTAGE_NORMAL 1250000 #define PU_SOC_VOLTAGE_HIGH 1275000 +#define FREQ_528_MHZ 528000000 #define FREQ_1P2_GHZ 1200000000 static struct regulator *arm_reg; @@ -110,14 +111,20 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index) * voltage of 528MHz, so lower the CPU frequency to one * half before changing CPU frequency. */ - clk_set_rate(arm_clk, (old_freq >> 1) * 1000); - clk_set_parent(pll1_sw_clk, pll1_sys_clk); + if ((old_freq * 1000) <= FREQ_528_MHZ) { + clk_set_rate(arm_clk, (old_freq >> 1) * 1000); + clk_set_parent(pll1_sw_clk, pll1_sys_clk); + } if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) clk_set_parent(secondary_sel_clk, pll2_bus_clk); else clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk); clk_set_parent(step_clk, secondary_sel_clk); clk_set_parent(pll1_sw_clk, step_clk); + if (freq_hz > FREQ_528_MHZ) { + clk_set_rate(pll1_sys_clk, freq_hz); + clk_set_parent(pll1_sw_clk, pll1_sys_clk); + } } else { clk_set_parent(step_clk, pll2_pfd2_396m_clk); clk_set_parent(pll1_sw_clk, step_clk);