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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id j125sm3283465lfg.28.2017.08.01.09.35.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Aug 2017 09:35:37 -0700 (PDT) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] ARM: dts: armada-38x: Add arm_global_timer node Date: Tue, 1 Aug 2017 18:36:23 +0200 Message-Id: <1501605383-24748-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1501605383-24748-1-git-send-email-mw@semihalf.com> References: <1501605383-24748-1-git-send-email-mw@semihalf.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170801_093557_710115_6E02FB1C X-CRM114-Status: UNSURE ( 8.94 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thomas.petazzoni@free-electrons.com, andrew@lunn.ch, jason@lakedaemon.net, jaz@semihalf.com, will.deacon@arm.com, linux@armlinux.org.uk, robh+dt@kernel.org, gregory.clement@free-electrons.com, mark.rutland@arm.com, Marcin Wojtas , cognet@ci0.org, sebastian.hesselbarth@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since generic Cortex-A9 global timer is available after adding it to compilation, enable its node in armada-38x.dtsi. Signed-off-by: Marcin Wojtas --- arch/arm/boot/dts/armada-38x.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index af31f5d..7ff0811e 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -154,6 +154,13 @@ reg = <0xc000 0x58>; }; + timer@c200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xc200 0x20>; + interrupts = ; + clocks = <&coreclk 2>; + }; + timer@c600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xc600 0x20>;