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Received: from szxga05-in.huawei.com ([45.249.212.191]) by casper.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dekDl-0007Gc-Pl for linux-arm-kernel@lists.infradead.org; Mon, 07 Aug 2017 15:45:36 +0000 Received: from 172.30.72.58 (EHLO DGGEMS406-HUB.china.huawei.com) ([172.30.72.58]) by dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DES74404; Mon, 07 Aug 2017 23:44:06 +0800 (CST) Received: from linux.huawei.com (10.67.187.203) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.301.0; Mon, 7 Aug 2017 23:43:57 +0800 From: Dongjiu Geng To: , , , , , , , , , , Subject: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg Date: Tue, 8 Aug 2017 00:08:37 +0800 Message-ID: <1502122117-6276-1-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 1.7.7 MIME-Version: 1.0 X-Originating-IP: [10.67.187.203] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.59888AC8.0048, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 60dbc00f41e2bfa76ef51b0daad336d8 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170807_164534_811665_5C7CF2DB X-CRM114-Status: GOOD ( 12.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP For the firmware-first RAS solution, SEA and SEI is injected by the user space, user space needs to know the esr_el2 and far_el2's value, so add them to sysreg. user space uses the IOCTL KVM_GET_ONE_REG can get their value. Signed-off-by: Dongjiu Geng Signed-off-by: Quanming Wu --- arch/arm64/include/asm/kvm_host.h | 6 ++++-- arch/arm64/kvm/sys_regs.c | 6 ++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index b6242fb..6063eec 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -103,10 +103,12 @@ enum vcpu_sysreg { TTBR0_EL1, /* Translation Table Base Register 0 */ TTBR1_EL1, /* Translation Table Base Register 1 */ TCR_EL1, /* Translation Control Register */ - ESR_EL1, /* Exception Syndrome Register */ + ESR_EL1, /* Exception Syndrome Register for EL1 */ + ESR_EL2, /* Exception Syndrome Register for EL2 */ AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ - FAR_EL1, /* Fault Address Register */ + FAR_EL1, /* Fault Address Register for EL1 */ + FAR_EL2, /* Fault Address Register for EL2 */ MAIR_EL1, /* Memory Attribute Indirection Register */ VBAR_EL1, /* Vector Base Address Register */ CONTEXTIDR_EL1, /* Context ID Register */ diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 0e26f8c..0c286bf 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -987,9 +987,15 @@ static const struct sys_reg_desc sys_reg_descs[] = { /* ESR_EL1 */ { Op0(0b11), Op1(0b000), CRn(0b0101), CRm(0b0010), Op2(0b000), access_vm_reg, reset_unknown, ESR_EL1 }, + /* ESR_EL2 */ + { Op0(0b11), Op1(0b100), CRn(0b0101), CRm(0b0010), Op2(0b000), + access_vm_reg, reset_unknown, ESR_EL2 }, /* FAR_EL1 */ { Op0(0b11), Op1(0b000), CRn(0b0110), CRm(0b0000), Op2(0b000), access_vm_reg, reset_unknown, FAR_EL1 }, + /* FAR_EL2 */ + { Op0(0b11), Op1(0b100), CRn(0b0110), CRm(0b0000), Op2(0b000), + access_vm_reg, reset_unknown, FAR_EL2 }, /* PAR_EL1 */ { Op0(0b11), Op1(0b000), CRn(0b0111), CRm(0b0100), Op2(0b000), NULL, reset_unknown, PAR_EL1 },