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mmc: renesas_sdhi: Add r8a7743/5 support

Message ID 1502710766-44361-1-git-send-email-biju.das@bp.renesas.com (mailing list archive)
State New, archived
Headers show

Commit Message

Biju Das Aug. 14, 2017, 11:39 a.m. UTC
Add support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) SDHI
is identical to the R-Car Gen2 family.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
This patch is compiled and tested againt linux next tag
next-20170811. This patch depend on the driver change
[PATCH ] mmc: renesas_sdhi: Add r8a7743/5 support
https://patchwork.kernel.org/patch/9898611/


 Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Rob Herring Aug. 17, 2017, 8:48 p.m. UTC | #1
On Mon, Aug 14, 2017 at 12:39:26PM +0100, Biju Das wrote:
> Add support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) SDHI
> is identical to the R-Car Gen2 family.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---
> This patch is compiled and tested againt linux next tag
> next-20170811. This patch depend on the driver change
> [PATCH ] mmc: renesas_sdhi: Add r8a7743/5 support
> https://patchwork.kernel.org/patch/9898611/
> 
> 
>  Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>
Wolfram Sang Aug. 21, 2017, 8:25 a.m. UTC | #2
>  	  Below is the number clocks for each supported SoC:
> -	   1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
> -	      R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
> +	   1: SH73A0, R8A73A4, R8A7740, R8A7743, R8A7745, R8A7778, R8A7779,
> +	      R8A7790, R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
>  	   2: R7S72100

Hmm, maybe we should convert this to only listing SoCs with two clocks?
That will be easier to maintaine since the majority seems to have one.
Biju Das Aug. 21, 2017, 9:47 a.m. UTC | #3
> -----Original Message-----
> From: Wolfram Sang [mailto:wsa@the-dreams.de]
> Sent: 21 August 2017 09:25
> To: Biju Das <biju.das@bp.renesas.com>
> Cc: Ulf Hansson <ulf.hansson@linaro.org>; Rob Herring <robh+dt@kernel.org>;
> Mark Rutland <mark.rutland@arm.com>; Simon Horman
> <horms@verge.net.au>; Magnus Damm <magnus.damm@gmail.com>; Chris
> Paterson <Chris.Paterson2@renesas.com>; Wolfram Sang
> <wsa+renesas@sang-engineering.com>; devicetree@vger.kernel.org; linux-
> renesas-soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> mmc@vger.kernel.org
> Subject: Re: [PATCH ] mmc: renesas_sdhi: Add r8a7743/5 support
>
>
> >    Below is the number clocks for each supported SoC:
> > -   1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
> > -      R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
> > +   1: SH73A0, R8A73A4, R8A7740, R8A7743, R8A7745, R8A7778,
> R8A7779,
> > +      R8A7790, R8A7791, R8A7792, R8A7793, R8A7794, R8A7795,
> R8A7796
> >     2: R7S72100
>
> Hmm, maybe we should convert this to only listing SoCs with two clocks?
> That will be easier to maintaine since the majority seems to have one.

Ok. I will send v2 with the suggested  changes.





Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index 4fd8b7a..0d507ec 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -15,6 +15,8 @@  Required properties:
 		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
 		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
 		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
+		"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
+		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
 		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
 		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
 		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
@@ -34,8 +36,8 @@  Required properties:
 	  "core" and "cd". If the controller only has 1 clock, naming is not
 	  required.
 	  Below is the number clocks for each supported SoC:
-	   1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
-	      R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
+	   1: SH73A0, R8A73A4, R8A7740, R8A7743, R8A7745, R8A7778, R8A7779,
+	      R8A7790, R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
 	   2: R7S72100
 
 Optional properties: