[v1,3/3] clk: rockchip: rk3126: add sclk_timer5 as critical clock

Commit Message

Elaine Zhang Sept. 1, 2017, 2:01 a.m. UTC

sclk_timer5 is for arm arch counter, so need always on.
but no dts node to handle this clk, so make it as critical clock

Signed-off-by: Elaine Zhang <[e-mail]>
---
 drivers/clk/rockchip/clk-rk3128.c | 1 +
 1 file changed, 1 insertion(+)

Patch

diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index ce02d2cff608..5970a50671b9 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -578,6 +578,7 @@  enum rk3128_plls {
 	"hclk_peri",
 	"pclk_peri",
 	"pclk_pmu",
+	"sclk_timer5",
 };
 
 static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)