@@ -50,3 +50,7 @@
&i2c0 {
status = "okay";
};
+
+&pvtctl {
+ socionext,tmod-calibration = <0x0f22 0x68ee>;
+};
@@ -46,6 +46,7 @@
clocks = <&sys_clk 32>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -64,6 +65,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster1_opp>;
+ #cooling-cells = <2>;
};
cpu3: cpu@101 {
@@ -173,6 +175,38 @@
<1 10 4>;
};
+ thermal-zones {
+ cpu_thermal {
+ polling-delay-passive = <250>; /* 250ms */
+ polling-delay = <1000>; /* 1000ms */
+ thermal-sensors = <&pvtctl>;
+
+ trips {
+ cpu_crit: cpu_crit {
+ temperature = <110000>; /* 110C */
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ cpu_alert: cpu_alert {
+ temperature = <100000>; /* 100C */
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu0 (-1) (-1)>;
+ };
+ map1 {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu2 (-1) (-1)>;
+ };
+ };
+ };
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -410,6 +444,12 @@
watchdog {
compatible = "socionext,uniphier-wdt";
};
+
+ pvtctl: pvtctl {
+ compatible = "socionext,uniphier-ld20-thermal";
+ interrupts = <0 3 4>;
+ #thermal-sensor-cells = <0>;
+ };
};
nand: nand@68000000 {
Add nodes of thermal monitor and thermal zone for UniPhier LD20 SoC. The thermal monitor is included in sysctrl. Furthermore, since the reference board doesn't have a calibrated value of thermal monitor, this patch gives the default value for LD20 reference board. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- .../arm64/boot/dts/socionext/uniphier-ld20-ref.dts | 4 +++ arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 40 ++++++++++++++++++++++ 2 files changed, 44 insertions(+)