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Mon, 02 Oct 2017 20:12:03 -0700 (PDT) Received: from node.jintackl-qv28633.kvmarm-pg0.wisc.cloudlab.us (c220g1-031126.wisc.cloudlab.us. [128.104.222.76]) by smtp.gmail.com with ESMTPSA id h84sm5367193iod.72.2017.10.02.20.12.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 02 Oct 2017 20:12:02 -0700 (PDT) From: Jintack Lim To: christoffer.dall@linaro.org, marc.zyngier@arm.com, kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH v2 22/31] KVM: arm64: Emulate AT S1E2 instructions Date: Mon, 2 Oct 2017 22:11:04 -0500 Message-Id: <1507000273-3735-20-git-send-email-jintack.lim@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1507000273-3735-1-git-send-email-jintack.lim@linaro.org> References: <1507000273-3735-1-git-send-email-jintack.lim@linaro.org> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, kvm@vger.kernel.org, rkrcmar@redhat.com, catalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, Jintack Lim , pbonzini@redhat.com, jintack@cs.columbia.edu, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Emulate AT S1E2 instructions by issuing the corresponding S1E1 instructions in EL2. We set the physical EL1 registers and the HCR_EL2 register as described in the AT instruction emulation overview. Signed-off-by: Jintack Lim --- arch/arm64/kvm/sys_regs.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index a82274f..cb46db5 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1641,6 +1641,21 @@ static bool handle_s1e01(struct kvm_vcpu *vcpu, struct sys_reg_params *p, return true; } +static bool handle_s1e2(struct kvm_vcpu *vcpu, struct sys_reg_params *p, + const struct sys_reg_desc *r) +{ + struct kvm_cpu_context *ctxt = &vcpu->arch.ctxt; + bool el2_format; + int sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); + + /* See the '1. EL2 AT instructions: S1E2x' table */ + ctxt->hw_sys_regs = ctxt->shadow_sys_regs; + el2_format = !vcpu_el2_e2h_is_set(vcpu); + + kvm_call_hyp(__kvm_at_insn, vcpu, p->regval, el2_format, sys_encoding); + return true; +} + /* * AT instruction emulation * @@ -1716,8 +1731,8 @@ static bool handle_s1e01(struct kvm_vcpu *vcpu, struct sys_reg_params *p, SYS_INSN_TO_DESC(AT_S1E0W, handle_s1e01, NULL), SYS_INSN_TO_DESC(AT_S1E1RP, handle_s1e01, NULL), SYS_INSN_TO_DESC(AT_S1E1WP, handle_s1e01, NULL), - SYS_INSN_TO_DESC(AT_S1E2R, NULL, NULL), - SYS_INSN_TO_DESC(AT_S1E2W, NULL, NULL), + SYS_INSN_TO_DESC(AT_S1E2R, handle_s1e2, NULL), + SYS_INSN_TO_DESC(AT_S1E2W, handle_s1e2, NULL), SYS_INSN_TO_DESC(AT_S12E1R, NULL, NULL), SYS_INSN_TO_DESC(AT_S12E1W, NULL, NULL), SYS_INSN_TO_DESC(AT_S12E0R, NULL, NULL),