From patchwork Thu Oct 5 16:49:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 9987591 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5A6226029B for ; Thu, 5 Oct 2017 16:51:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C52728CF2 for ; Thu, 5 Oct 2017 16:51:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4117628CF6; Thu, 5 Oct 2017 16:51:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B7CB328CF2 for ; Thu, 5 Oct 2017 16:51:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=pQZtaDFmQ+696ENRAwEaVY1h+nvQ8Uu5LbEkgC4vf3I=; b=t7T KcHoOlWm05CNFE/SEbxXR/aUMHS+0A2jsdx6RDOJb8YszhsAs/vgMVJrxWeEgHZJubX9EFsdBtSCq 7Oe0ZhvZJIplSJ9BDNXvfVbFOWwSkEXZGuTGTa1+76B2BIBmVDLIrG2ZTSSZU/jY69HiT9mKUgEfA hYCaMfbhvVENzCNK94PQ1EJzeUrUALExI4nWLQ3kjVXd+b1ZDSEPpaiuDKPnS26plPhJ/q37shfOO mm3FZ8ftYnMwJefxjK1iQB7xE24kbT0UCsTWUXNpE7D9y+rVXfCSb44xESULENfH+l/sjggY0UkVX LXx/4KRYD5FuVqupu5SmvyaZKFd5LGA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e09MO-0002Az-S8; Thu, 05 Oct 2017 16:50:56 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e09L8-00087T-5D for linux-arm-kernel@lists.infradead.org; Thu, 05 Oct 2017 16:49:44 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0131F80D; Thu, 5 Oct 2017 09:49:18 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C50143F53D; Thu, 5 Oct 2017 09:49:17 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 219EB1AE2F43; Thu, 5 Oct 2017 17:49:19 +0100 (BST) From: Will Deacon To: iommu@lists.linux-foundation.org Subject: [PATCH] iommu/arm-smmu-v3: Ensure we sync STE when only changing config field Date: Thu, 5 Oct 2017 17:49:18 +0100 Message-Id: <1507222158-4151-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171005_094938_758784_FE41DCA9 X-CRM114-Status: GOOD ( 10.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: eric.auger@redhat.com, Will Deacon , Robin Murphy , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The SMMUv3 architecture permits caching of data structures deemed to be "reachable" by the SMU, which includes STEs marked as invalid. When transitioning an STE to a bypass/fault configuration at init or detach time, we mistakenly elide the CMDQ_OP_CFGI_STE operation in some cases, therefore potentially leaving the old STE state cached in the SMMU. This patch fixes the problem by ensuring that we perform the CMDQ_OP_CFGI_STE operation irrespective of the validity of the previous STE. Cc: Robin Murphy Reported-by: Eric Auger Signed-off-by: Will Deacon Reviewed-by: Robin Murphy Reviewed-by: Eric Auger --- drivers/iommu/arm-smmu-v3.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 47f52b1ab838..91fdabdb4de6 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1085,8 +1085,11 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_device *smmu, u32 sid, dst[1] = cpu_to_le64(STRTAB_STE_1_SHCFG_INCOMING << STRTAB_STE_1_SHCFG_SHIFT); dst[2] = 0; /* Nuke the VMID */ - if (ste_live) - arm_smmu_sync_ste_for_sid(smmu, sid); + /* + * The SMMU can perform negative caching, so we must sync + * the STE regardless of whether the old value was live. + */ + arm_smmu_sync_ste_for_sid(smmu, sid); return; }