From patchwork Mon Oct 23 09:58:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10022283 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 29F7C603D7 for ; Mon, 23 Oct 2017 10:00:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 175A0287F2 for ; Mon, 23 Oct 2017 10:00:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0C25A28828; Mon, 23 Oct 2017 10:00:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 969B2287F2 for ; Mon, 23 Oct 2017 10:00:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=FnsSZtQYQ5ZHBAdcdQPEU/p8YDuogh/gqqZpB9nbt9Y=; b=o+PQWybmHkyxFoO4hCb3v0zZEL cGjNExeILfp0Wjzk/jQFfZtOZ59ivgvSTk4yTot4jL0H3TqLA9iMNmDhfLjkoTOZ0mNEYy4VoBbb2 ky55PicNboRAfZex5+Rfx2xetfzFD+vPkwnGz3vBqIx9cnyZLhnHKe6C1TkvBObIHkhlcW0vAXLVT X7ZeCgYKMpx6WQ2nathDxEaV4uWQDGGurVJCmgjIEaKYC+A7f7PWEqlQsuwmZZKN6MKN+FM6K57No 9zMp6HpzrgrHCm9VufANpke//4tKTogSRbDii7mrKxHfLZNDU56JPfvYyJs5+Y1qwel9pdrLddVJB iZi7+/oQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e6ZXC-000111-4G; Mon, 23 Oct 2017 10:00:38 +0000 Received: from mail-wr0-x241.google.com ([2a00:1450:400c:c0c::241]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e6ZWe-0007fn-OK for linux-arm-kernel@lists.infradead.org; Mon, 23 Oct 2017 10:00:07 +0000 Received: by mail-wr0-x241.google.com with SMTP id u40so10826787wrf.10 for ; Mon, 23 Oct 2017 02:59:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tmtSr2/2KFY2IKM3M2bm/gYOBh5Ln7Q51D9HxqoTEVE=; b=N/OnrsnrnPxZf/Shlrq06Z7tuCIicxmYMuyqLVBrqT3xR18HDw6hbO0Sg8TKjNERxW 6AJnojEut+2TBa9ayNhGVwBGqJp+h/dgBHF0lNamSm3R6w5RG/hH1p8RSPEORex+db7v 6EVFpjxrJUjYkD9+boR25P7PLigfXKPI2FxX8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tmtSr2/2KFY2IKM3M2bm/gYOBh5Ln7Q51D9HxqoTEVE=; b=dz1tspFVGL/JykgGhDDHu+DDhEdrsO3yzCNTQ6jnM+GkwNjqdp4Xeh7hWdrDzUwbmO 0UFH6pf8g4sUs/6z+GtgCU42Cc3tBI0EtNrSQKL07sooUHDi0nmwkETDW9HXUkN5cKWT 51Js1qIzpP8oobBS9X0l14dUS1Q9iadWPxhvv0Tb6m8683MgtDufViU/PGnVurctZVC/ 9JVNBOEKYTcaf78Xqo0JbodVgfp5J2h3Z4Wf1LoCxgbuTi2gIKXDqiOAoNJskRRKbnAF d8rV95N1G4f0dJqPPA9Og9jvoCkYT/T/390YbBrBk6FctWvbp968cijJ0HwJnho5YcfG Rc9w== X-Gm-Message-State: AMCzsaXtbRG+oqeJoZu0DMMgzcOlp5KUxmdS95jVcqW6SPznBkQzkD/1 i3N+2xDLmdKgID5tZqUgMIuyJw== X-Google-Smtp-Source: ABhQp+TsrcdttezTc2DFPBVLO5/V41Tm3cjqVzq0djnqTgHzvQGs8uLTWycQxZJyrs0U8lLLUFEgPw== X-Received: by 10.223.190.14 with SMTP id n14mr5644575wrh.46.1508752784114; Mon, 23 Oct 2017 02:59:44 -0700 (PDT) Received: from lmecxl0911.lme.st.com ([80.214.127.33]) by smtp.gmail.com with ESMTPSA id q188sm3626900wmb.43.2017.10.23.02.59.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Oct 2017 02:59:43 -0700 (PDT) From: Benjamin Gaignard To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, daniel.lezcano@linaro.org, tglx@linutronix.de, ludovic.barre@st.com, julien.thierry@arm.com Subject: [PATCH v7 3/6] clocksource: stm32: increase min delta value Date: Mon, 23 Oct 2017 11:58:39 +0200 Message-Id: <1508752722-4489-4-git-send-email-benjamin.gaignard@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508752722-4489-1-git-send-email-benjamin.gaignard@linaro.org> References: <1508752722-4489-1-git-send-email-benjamin.gaignard@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171023_030005_022137_24127333 X-CRM114-Status: GOOD ( 11.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The CPU is a CortexM4 @ 200MHZ and the clocks driving the timers are at 90MHZ with a min delta at 1 you could have an interrupt each 0.01 ms which is really to much. By increase it to 0x60 it give more time (around 1 ms) to CPU to handle the interrupt. Signed-off-by: Benjamin Gaignard --- drivers/clocksource/timer-stm32.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-stm32.c b/drivers/clocksource/timer-stm32.c index fc61fd1..dc9fee6 100644 --- a/drivers/clocksource/timer-stm32.c +++ b/drivers/clocksource/timer-stm32.c @@ -36,6 +36,8 @@ #define TIM_EGR_UG BIT(0) +#define MIN_DELTA 0x60 + static int stm32_clock_event_shutdown(struct clock_event_device *evt) { struct timer_of *to = to_timer_of(evt); @@ -129,7 +131,8 @@ static int __init stm32_clockevent_init(struct device_node *node) writel_relaxed(0, timer_of_base(to) + TIM_SR); clockevents_config_and_register(&to->clkevt, - timer_of_period(to), 0x1, max_delta); + timer_of_period(to), + MIN_DELTA, max_delta); pr_info("%pOF: STM32 clockevent driver initialized (%d bits)\n", node, bits);