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Thu, 9 Nov 2017 20:47:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1510260443; bh=DuxslfKaFEeGelK5ai7NKAoe/pEkuxH9ldfKPi3TqD4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nIm2bXCBwZy/BSoz6FUhHUrvfHg21fgvdfhrx4jrM39K44u/f+aVIb+i6svLe9Wcw 2Cw0MpI9TNUYKt5Ybo1C1CHMhpZo6WvZqhu8+SCQk41FB0h3inT67eC64yDkyhWf5J G8VD7+TSP48V6OuLd+2M4WGPBhReRS0Me8eQ8DiE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3C44E6084A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=poza@codeaurora.org From: Pawandeep Oza To: linux-pci@vger.kernel.org, timur@codeaurora.org Subject: [PATCH 4/4] PCI/AER: Dont do recovery when DPC is enabled Date: Fri, 10 Nov 2017 02:16:39 +0530 Message-Id: <1510260399-14886-5-git-send-email-poza@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1510260399-14886-1-git-send-email-poza@codeaurora.org> References: <1510260399-14886-1-git-send-email-poza@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171109_124746_259391_1B0CA173 X-CRM114-Status: GOOD ( 11.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Oza Pawandeep , Gabriele Paoloni , Greg Kroah-Hartman , Dongdong Liu , linux-arm-msm@vger.kernel.org, Bjorn Helgaas , Thomas Gleixner , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Oza Pawandeep PCI Express Base Specification, Rev. 4.0 Version 0.9 6.2.10: Downstream Port Containment (DPC) DPC is an optional normative feature of a Downstream Port. DPC halts PCI Express traffic below a Downstream Port after an unmasked uncorrectable error is detected at or below the Port, avoiding the potential spread of any data corruption, and permitting error recovery if supported by software Triggering DPC disables its Link by directing the LTSSM to the Disabled state. Once the LTSSM reaches the Disabled state, it remains in that state until the DPC Trigger Status bit is Cleared So when DPC service is active and registered to port driver, AER should not attempt to recover, since DPC will be removing downstream devices. Signed-off-by: Oza Pawandeep diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 7448052..8d48d5c 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c @@ -495,6 +495,18 @@ static void do_recovery(struct pci_dev *dev, int severity) pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED; enum pci_channel_state state; + /* + * If DPC is enabled, there is no need to attempt recovery. + * Since DPC disables its Link by directing the LTSSM to + * the Disabled state. + * DPC driver will take care of the recovery, there is no need + * for AER driver to race. + */ + if (pcie_port_query_service(dev, PCIE_PORT_SERVICE_DPC)) { + dev_info(&dev->dev, "AER: Device recovery to be done by DPC\n"); + return; + } + if (severity == AER_FATAL) state = pci_channel_io_frozen; else