From patchwork Mon Nov 13 01:42:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shanker Donthineni X-Patchwork-Id: 10055075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5477860365 for ; Mon, 13 Nov 2017 01:43:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 456212922B for ; Mon, 13 Nov 2017 01:43:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 38AB52922F; Mon, 13 Nov 2017 01:43:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D32C32922B for ; Mon, 13 Nov 2017 01:43:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=pt3+7252G0MkgTDw2OOl6hQ888sr2wEgBZV0Dtu/6tM=; b=RuYk8Y8jrd/vzFzzWgt/trVUD/ e+buoIt5ogTaW/bsQWWNfqJlbzTW0UCjfXkR5i6qyzMb3vdHblYKdvAzuPPLsAITEyZg+kezKpsTh GwmwbF5OXx9mYtuMCCtrAAy+Pqgr7/iHFX06P6L59/3IXww30Q2U7e0k+ZXp/iI2YGntlxfIVoU78 fwtKcCR66RP2gK5wxOaCrCKi/dHIEzopYh7PG0j+srIqeop/epbmIPxVXxBpvLEgGUtsnDG1iFZiD 9AEXcSLGjQT+PTm7/UgYFyyFaQesvMKJLGG+UnV+gKKGPH81XmcD9eEtpyP8a9C4fDpkosdAe2Mmv zpwAMfBQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eE3mV-0000I8-0q; Mon, 13 Nov 2017 01:43:23 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eE3mB-0008T1-JV for linux-arm-kernel@lists.infradead.org; Mon, 13 Nov 2017 01:43:05 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 8BF266081F; Mon, 13 Nov 2017 01:42:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1510537365; bh=ZWBd6W/3LZ7J6JU8CEIFc34fihZIGLWLmm858am7XF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kHq6uShk/ndZPApQ8vFLQh9mPoKonDyGBEHBqBCCFkMDGNSu1hIH1uPxwezEH84W8 bjoRIATAZ6flQn1K8rxuqw6USDlKF9+/6o6jQd47zr1d2cVMR6B3Hxbdd3z7oq6PEs lD/o2P6jb2MnvsOFwfBH/8TPFwfpBXUA7K2pNN8M= Received: from shankerd-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: shankerd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B38FB6024A; Mon, 13 Nov 2017 01:42:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1510537363; bh=ZWBd6W/3LZ7J6JU8CEIFc34fihZIGLWLmm858am7XF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iKbqqX0N0b+tAJ3qCWJRZHClKz1PC5IaRL8CsMFAww478g1WWeKVpX0oII5eC/a82 lNPhp2L/sJ8GFLU4gbOFL4F4p9XKLqw2HHVqUJZCfLA8mxF3zD4Jul7q+DtRjsYSjA xOQLGjn+vQeqRVH5YZ8Yr0JlPKLk1gYsIVpl5ono= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B38FB6024A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=shankerd@codeaurora.org From: Shanker Donthineni To: Will Deacon , Marc Zyngier , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/2] arm64: Define cputype macros for Falkor CPU Date: Sun, 12 Nov 2017 19:42:38 -0600 Message-Id: <1510537359-9978-2-git-send-email-shankerd@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1510537359-9978-1-git-send-email-shankerd@codeaurora.org> References: <1510537359-9978-1-git-send-email-shankerd@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171112_174303_702584_226AE074 X-CRM114-Status: GOOD ( 10.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-efi@vger.kernel.org, Ard Biesheuvel , Matt Fleming , Catalin Marinas , linux-kernel@vger.kernel.org, James Morse , Shanker Donthineni , Robin Murphy , kvmarm@lists.cs.columbia.edu, Christoffer Dall MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add cputype definition macros for Qualcomm Datacenter Technologies Falkor CPU in cputype.h. It's unfortunate that the first revision of the Falkor CPU used the wrong part number 0x800, got fixed in v2 chip with part number 0xC00, and would be used the same value for future revisions. Signed-off-by: Shanker Donthineni --- arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 235e77d..cbf08d7 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -91,6 +91,7 @@ #define BRCM_CPU_PART_VULCAN 0x516 #define QCOM_CPU_PART_FALKOR_V1 0x800 +#define QCOM_CPU_PART_FALKOR 0xC00 #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53) #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57) @@ -99,6 +100,7 @@ #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1) +#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) #ifndef __ASSEMBLY__