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[139.162.245.42]) by smtp.gmail.com with ESMTPSA id p79sm4963984wmf.43.2017.11.18.01.12.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 18 Nov 2017 01:12:45 -0800 (PST) From: Leo Yan To: Catalin Marinas , Will Deacon , Mark Rutland , AKASHI Takahiro , Mathieu Poirier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] arm64: kdump: Avoid to power off nonpanic CPUs Date: Sat, 18 Nov 2017 17:12:32 +0800 Message-Id: <1510996352-16684-1-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171118_011310_184392_891EA800 X-CRM114-Status: GOOD ( 12.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: James Morse , Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP commit a88ce63b642c ("arm64: kexec: have own crash_smp_send_stop() for crash dump for nonpanic cores") introduces ARM64 architecture function crash_smp_send_stop() to replace the weak function, this results in the nonpanic CPUs to be hot-plugged out and CPUs are placed into low power state on ARM64 platforms with the flow: Panic CPU: machine_crash_shutdown() crash_smp_send_stop() smp_cross_call(&mask, IPI_CPU_CRASH_STOP) Nonpanic CPUs: handle_IPI() ipi_cpu_crash_stop() cpu_ops[cpu]->cpu_die() The upper patch has no issue if enabled crash dump only; but if enabled crash dump and Coresight debug module for panic dumping at the meantime, nonpanic CPUs are powered off in crash dump flow, later this may introduce conflicts with the Coresight debug module because Coresight debug registers dumping requires the CPU must be powered on for some platforms (e.g. Hi6220 on Hikey board). If we cannot keep the CPUs powered on, we can see the hardware lockup issue when access Coresight debug registers. To fix this issue, this commit bypasses CPU hotplug operation in func crash_smp_send_stop() when coresight CPU debug module has been enabled and let CPUs to run into WFE/WFI states so CPUs can still be powered on after crash dump. This finally is more safe for Coresight debug module to dump registers and avoid hardware lockup. Cc: Catalin Marinas Cc: James Morse Cc: Mark Rutland Cc: Mathieu Poirier Cc: Will Deacon Signed-off-by: Leo Yan --- arch/arm64/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 9f7195a..31dab1f 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -856,7 +856,7 @@ static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs) local_irq_disable(); -#ifdef CONFIG_HOTPLUG_CPU +#if defined(CONFIG_HOTPLUG_CPU) && !defined(CONFIG_CORESIGHT_CPU_DEBUG) if (cpu_ops[cpu]->cpu_die) cpu_ops[cpu]->cpu_die(cpu); #endif