From patchwork Mon Nov 27 23:17:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shanker Donthineni X-Patchwork-Id: 10078359 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B92AA60353 for ; Mon, 27 Nov 2017 23:28:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB33529047 for ; Mon, 27 Nov 2017 23:28:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FE072908E; Mon, 27 Nov 2017 23:28:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 23BEC29047 for ; Mon, 27 Nov 2017 23:28:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=pt3+7252G0MkgTDw2OOl6hQ888sr2wEgBZV0Dtu/6tM=; b=twqcEqcHZZtD5cOxDQdFhJcozk vAt96kMG4ROm8kSM/PCGkR38J54PUj+QM3FvyXzbRbn16yEl21kJbHJoNvX8777kyPYVBYGOHK7BX i4AHPPK2cCn/k82kDisn7zA+immtGz0GcHuAG9dcm2V0g4QlRaan4zTBm9RS7ldWK2x+UNpi6hGk0 tCMaouMmmEKhaCTqoEhGgCL+kGYZCsZLPFhm/DuvMVS4IYxKvShIy2eO7qtqVWmvfk5OSHvrq4U53 6cHka3hRaPBO4JtOzUNLrQs11KwhL3a8aNUMNGFFOTcoGFFHNfaJnw3S2XIL0FHzsgyvxQZr30OaG wkdfy0rg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eJSop-0007PU-2V; Mon, 27 Nov 2017 23:28:07 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eJSfd-0003My-J3 for linux-arm-kernel@lists.infradead.org; Mon, 27 Nov 2017 23:18:40 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B52BB6A419; Mon, 27 Nov 2017 23:18:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511824698; bh=ZWBd6W/3LZ7J6JU8CEIFc34fihZIGLWLmm858am7XF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TOp8vamyqLTd506QqBlHzMj56aDPNmfnh3wbusXFL7bN8XlhBpJD79KqxIzLpXDDX oc13ACbdm4DLbqbyE5Ym1HxOwvPN2lkNHEtiMBb4TxDtTDMsx5mFt8CWoqDotV3LwX 1UyHMKNc7rQOCNDi5MLM5Sq/uRKXWEyw/+mC//pQ= Received: from shankerd-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: shankerd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id BE3216A28A; Mon, 27 Nov 2017 23:18:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511824697; bh=ZWBd6W/3LZ7J6JU8CEIFc34fihZIGLWLmm858am7XF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iUcHMt19jR21PBQVmsDV5CAE2ECra5t0Y9hk9Di89cgSQGE9jdfwZ+2GA/4t7JCM6 dKqqh+x/qIWUxtAdGw5am70zfu7d24Qn3CNlOV4KdKMYBbPYhUcXL4dMmZ5yRMXQCN EZh67PkNRrjbaaX0Uw12e+o4tq47D4hLBfJn8G3I= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BE3216A28A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=shankerd@codeaurora.org From: Shanker Donthineni To: Will Deacon , Marc Zyngier , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 1/2] arm64: Define cputype macros for Falkor CPU Date: Mon, 27 Nov 2017 17:17:59 -0600 Message-Id: <1511824680-16397-2-git-send-email-shankerd@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511824680-16397-1-git-send-email-shankerd@codeaurora.org> References: <1511824680-16397-1-git-send-email-shankerd@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171127_151837_751189_2B80DB79 X-CRM114-Status: GOOD ( 10.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-efi@vger.kernel.org, Ard Biesheuvel , Matt Fleming , Catalin Marinas , linux-kernel@vger.kernel.org, James Morse , Shanker Donthineni , Robin Murphy , kvmarm@lists.cs.columbia.edu, Christoffer Dall MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add cputype definition macros for Qualcomm Datacenter Technologies Falkor CPU in cputype.h. It's unfortunate that the first revision of the Falkor CPU used the wrong part number 0x800, got fixed in v2 chip with part number 0xC00, and would be used the same value for future revisions. Signed-off-by: Shanker Donthineni --- arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 235e77d..cbf08d7 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -91,6 +91,7 @@ #define BRCM_CPU_PART_VULCAN 0x516 #define QCOM_CPU_PART_FALKOR_V1 0x800 +#define QCOM_CPU_PART_FALKOR 0xC00 #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53) #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57) @@ -99,6 +100,7 @@ #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1) +#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) #ifndef __ASSEMBLY__