From patchwork Mon Jan 8 21:31:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shanker Donthineni X-Patchwork-Id: 10150621 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4C8D9601BE for ; Mon, 8 Jan 2018 21:31:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4857D289A5 for ; Mon, 8 Jan 2018 21:31:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3A84327F8E; Mon, 8 Jan 2018 21:31:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3BF7728998 for ; Mon, 8 Jan 2018 21:31:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=XJvUiK8oul3u7KsPDDmPWS2LNWLXgQ6OAn/AJevLxwg=; b=gD8 4JDn8pE57aSKC3iSazrk5WVsk8WodeO4XM1fYJk+I37MFfcBTU5rMOVkZE/u282JOCDW9pmaGgfnM tFJu0n1CPOTSgXywzFiXZMU/iFDsJKy6P1xhMQbhL4uOILEqd82dTId9LtL91nX4GVbw+mzOcaBlw FI0fJssxqhYndR7EGLw1TANqKEYFrvuFhonT1/nBjNT/THOtbfP0Mxg9fcDQngeUo+W+lDNo0QOPx 2PnKxqQedF+b5FyPC+P5oTKQGeaEeTD/nxwwepeoFF3A3xm2sub8x45wDjxmCSHPEQZmvpZda93xi 3sxAD2YT2gzhbBzGwJuvn3D5iB6NqZg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1eYf11-0000Cg-GD; Mon, 08 Jan 2018 21:31:31 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1eYf0x-0000AQ-6Q for linux-arm-kernel@lists.infradead.org; Mon, 08 Jan 2018 21:31:29 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 6DC6D60BDF; Mon, 8 Jan 2018 21:31:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515447076; bh=l7kpO9RRv+MPUWEkUz0dhpNy4eLxGR5eKMYDRSZAH2E=; h=From:To:Cc:Subject:Date:From; b=Dmj8qUb8pm4W1I+ytKDMfHKO0moVZx3clfed4j7mKWTrA40VK3hQHTmrBiLSWqxbW ODfoQz2zq0h2zyhx/AIQtsYUD8/Lj+wV+JwwOdJMkjg7w9UzTtsqI4SvCp1THf67t2 xMBtHonU0FeqDupo5WJG4qIQ6d8v+wWzBH273ByU= Received: from shankerd-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: shankerd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0E89960112; Mon, 8 Jan 2018 21:31:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515447076; bh=l7kpO9RRv+MPUWEkUz0dhpNy4eLxGR5eKMYDRSZAH2E=; h=From:To:Cc:Subject:Date:From; b=Dmj8qUb8pm4W1I+ytKDMfHKO0moVZx3clfed4j7mKWTrA40VK3hQHTmrBiLSWqxbW ODfoQz2zq0h2zyhx/AIQtsYUD8/Lj+wV+JwwOdJMkjg7w9UzTtsqI4SvCp1THf67t2 xMBtHonU0FeqDupo5WJG4qIQ6d8v+wWzBH273ByU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0E89960112 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=shankerd@codeaurora.org From: Shanker Donthineni To: Marc Zyngier , Christoffer Dall , linux-kernel , linux-arm-kernel , kvmarm Subject: [PATCH v2 1/2] arm64: Define cputype macros for Falkor CPU Date: Mon, 8 Jan 2018 15:31:07 -0600 Message-Id: <1515447068-20977-1-git-send-email-shankerd@codeaurora.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180108_133127_318434_169A1FB8 X-CRM114-Status: GOOD ( 10.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Speier , Vikram Sethi , Sean Campbell , Catalin Marinas , Will Deacon , James Morse , Paolo Bonzini , Shanker Donthineni MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add cputype definition macros for Qualcomm Datacenter Technologies Falkor CPU in cputype.h. It's unfortunate that the first revision of the Falkor CPU used the wrong part number 0x800, got fixed in v2 chip with part number 0xC00, and would be used the same value for future revisions. Signed-off-by: Shanker Donthineni Signed-off-by: Will Deacon --- This patch is availble at https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm64?h=v4.15-rc7&id=c622cc013cece073722592cff1ac6643a33b1622 arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 84385b9..424ca71d 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -93,6 +93,7 @@ #define BRCM_CPU_PART_VULCAN 0x516 #define QCOM_CPU_PART_FALKOR_V1 0x800 +#define QCOM_CPU_PART_FALKOR 0xC00 #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53) #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57) @@ -103,6 +104,7 @@ #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1) +#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) #ifndef __ASSEMBLY__