From patchwork Thu Mar 1 12:54:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Shi X-Patchwork-Id: 10251459 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 001CB604D4 for ; Thu, 1 Mar 2018 13:43:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E1607205F7 for ; Thu, 1 Mar 2018 13:43:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CFB7F21BED; Thu, 1 Mar 2018 13:43:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 94AE5223A5 for ; Thu, 1 Mar 2018 13:42:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=aRKQa/boRsZcMk7Bn60VDet8UbXmmK9X4wCFAhLW4GM=; b=Smz0hPNB2oANNIO4v4dhvpBK0M AKCFee2ZVSrRokQl9rAHPW9E/caloqFROxkTUzs72BXzg2kTgFOQPEYGNrpkqzVvBUKqqfdrMUZ77 SSjwqQPyYAN0a77wrjjgjZ+NX3O0qRi/OGSz+Wl91dTDerwdeR8RsbPMBhj6Calw68X0MMLgZM+HW h9bQtQE2xqpLibppkxBw71Jlj7R7VBjVBJIhFso7ql5UXMbHJhO+6ZM0LElpJmbjQZ5ifh6DMhBLE fh0o3517UR6UQzHdiwefw0RMyhnAvgdxX5UfJq35JKx4jZAj7/DN1H+0k5G61qR6mH+MfcWCCVU3N AaU6uysg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1erOTl-0004tp-C9; Thu, 01 Mar 2018 13:42:37 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1erO0R-0005gV-Tb for linux-arm-kernel@bombadil.infradead.org; Thu, 01 Mar 2018 13:12:20 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=LVyW4e3/ZiswQxGmhghNNTu5Pe0KH7+4scjkon+J7js=; b=aqLTfxUjGd0k2rS6e2r1AkWRp XlDNKyBMvC1Z2Y0BA6HZvrijHmEUHbgQbkbm/cb5HpYS+Mb3E63sPNTFoZymhFAu2kuU2YehPxBA2 9TtsT2vC9ZnKFVYyJG45jM1ddmWnS16pSTSDmGU1RlQ8dP5zQ4TIv+dmiraa88fkELs9WChvaSbhh lnxvKf4VpoHZm7WYJj8qEJBtKTSVJs6/b8o9d9YzKwGgodMlGdoVCJvQIK4hLVQ3yJSd0NmhY6rVx Hp/2d8DvzwfqC8kzZiyRP/oy8GPIHrnFrRaosdLkCz1uqRdvHKRDReNggCa3XtsHwuILdZBDgYWt+ Ulc5hlUGA==; Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]) by casper.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1erNo4-00059z-Tx for linux-arm-kernel@lists.infradead.org; Thu, 01 Mar 2018 12:59:34 +0000 Received: by mail-pg0-x243.google.com with SMTP id q27so2268583pgn.8 for ; Thu, 01 Mar 2018 04:59:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LVyW4e3/ZiswQxGmhghNNTu5Pe0KH7+4scjkon+J7js=; b=TSi4qw+PBRPwqxaK5h7uIK7sqDHPIq59aqoFS3cuBmSFfu62O14ncON6D1XvkgZ86g FiG07MpGA6rb1NlDEfQgmm4xsibPm3kLDs06hpiRD5G6kOmCzslEuelG9gGKvnFfFB87 bSEb1SIPy5LkLg521qXlNe8UfuG94rHDmADE4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LVyW4e3/ZiswQxGmhghNNTu5Pe0KH7+4scjkon+J7js=; b=Jgzt4CHCGushR/ThEK5iE1N6G4m7n9R9k8rdfcFprCrh3JUftiyCGbMda/ZUIPfokn btgroiSFqIc0Q58iZBayOoNZjxqkwuX/RfStY+st16ZS4O6oig9ooxhzhvysjzj92TaP 0swK4Nc+9D+23IYUhbs68fFTJ3jIPq7kThKx5rSQLAkpswYrtw322Ksd6E1hil8Sq9Z5 c1HDaViEEeJHnWgL0sv+KZIZDaPSGmrXKEngHMtPxvobg60qP+KjB3dXZt4MShVrkSpJ GK73FNh+zSzkWautv34iZYXitfGpzXCinYvVshjNHok8yKZNI2Miqn5hR+7Bk0fMkgYu /fkw== X-Gm-Message-State: APf1xPCX64y3U8KZkmg971GWorDAillwGahYL0BbpoXDtPjzeB0CYTzP bmzfgtbIyodVqE3tmUryUGLW4w== X-Google-Smtp-Source: AG47ELtFaRIVwQSMw5iqCTc3Xh5dh53cFI3tKoB7sVhnLaa0Ty91NO/1KZOM6qDXY5kBPyZwQgUZPg== X-Received: by 10.101.87.199 with SMTP id q7mr1496822pgr.215.1519909161327; Thu, 01 Mar 2018 04:59:21 -0800 (PST) Received: from localhost.localdomain (176.122.172.82.16clouds.com. [176.122.172.82]) by smtp.gmail.com with ESMTPSA id x4sm2289655pfb.46.2018.03.01.04.59.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Mar 2018 04:59:20 -0800 (PST) From: Alex Shi To: Marc Zyngier , Will Deacon , Ard Biesheuvel , Catalin Marinas , stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 29/45] arm64: Implement branch predictor hardening for affected Cortex-A CPUs Date: Thu, 1 Mar 2018 20:54:06 +0800 Message-Id: <1519908862-11425-30-git-send-email-alex.shi@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519908862-11425-1-git-send-email-alex.shi@linaro.org> References: <1519908862-11425-1-git-send-email-alex.shi@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180301_125932_959364_73C7A128 X-CRM114-Status: GOOD ( 15.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Shi MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Will Deacon commit aa6acde65e03 upstream. Cortex-A57, A72, A73 and A75 are susceptible to branch predictor aliasing and can theoretically be attacked by malicious code. This patch implements a PSCI-based mitigation for these CPUs when available. The call into firmware will invalidate the branch predictor state, preventing any malicious entries from affecting other victim contexts. Co-developed-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Signed-off-by: Alex Shi --- arch/arm64/kernel/bpi.S | 24 ++++++++++++++++++++++++ arch/arm64/kernel/cpu_errata.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S index 06a931e..dec95bd 100644 --- a/arch/arm64/kernel/bpi.S +++ b/arch/arm64/kernel/bpi.S @@ -53,3 +53,27 @@ ENTRY(__bp_harden_hyp_vecs_start) vectors __kvm_hyp_vector .endr ENTRY(__bp_harden_hyp_vecs_end) +ENTRY(__psci_hyp_bp_inval_start) + sub sp, sp, #(8 * 18) + stp x16, x17, [sp, #(16 * 0)] + stp x14, x15, [sp, #(16 * 1)] + stp x12, x13, [sp, #(16 * 2)] + stp x10, x11, [sp, #(16 * 3)] + stp x8, x9, [sp, #(16 * 4)] + stp x6, x7, [sp, #(16 * 5)] + stp x4, x5, [sp, #(16 * 6)] + stp x2, x3, [sp, #(16 * 7)] + stp x0, x1, [sp, #(16 * 8)] + mov x0, #0x84000000 + smc #0 + ldp x16, x17, [sp, #(16 * 0)] + ldp x14, x15, [sp, #(16 * 1)] + ldp x12, x13, [sp, #(16 * 2)] + ldp x10, x11, [sp, #(16 * 3)] + ldp x8, x9, [sp, #(16 * 4)] + ldp x6, x7, [sp, #(16 * 5)] + ldp x4, x5, [sp, #(16 * 6)] + ldp x2, x3, [sp, #(16 * 7)] + ldp x0, x1, [sp, #(16 * 8)] + add sp, sp, #(8 * 18) +ENTRY(__psci_hyp_bp_inval_end) diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 0e07893..f8810bf 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -53,6 +53,8 @@ static int cpu_enable_trap_ctr_access(void *__unused) DEFINE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data); #ifdef CONFIG_KVM +extern char __psci_hyp_bp_inval_start[], __psci_hyp_bp_inval_end[]; + static void __copy_hyp_vect_bpi(int slot, const char *hyp_vecs_start, const char *hyp_vecs_end) { @@ -94,6 +96,9 @@ static void __install_bp_hardening_cb(bp_hardening_cb_t fn, spin_unlock(&bp_lock); } #else +#define __psci_hyp_bp_inval_start NULL +#define __psci_hyp_bp_inval_end NULL + static void __install_bp_hardening_cb(bp_hardening_cb_t fn, const char *hyp_vecs_start, const char *hyp_vecs_end) @@ -118,6 +123,21 @@ static void install_bp_hardening_cb(const struct arm64_cpu_capabilities *entry, __install_bp_hardening_cb(fn, hyp_vecs_start, hyp_vecs_end); } + +#include + +static int enable_psci_bp_hardening(void *data) +{ + const struct arm64_cpu_capabilities *entry = data; + + if (psci_ops.get_version) + install_bp_hardening_cb(entry, + (bp_hardening_cb_t)psci_ops.get_version, + __psci_hyp_bp_inval_start, + __psci_hyp_bp_inval_end); + + return 0; +} #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ #define MIDR_RANGE(model, min, max) \ @@ -211,6 +231,28 @@ const struct arm64_cpu_capabilities arm64_errata[] = { .def_scope = SCOPE_LOCAL_CPU, .enable = cpu_enable_trap_ctr_access, }, +#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR + { + .capability = ARM64_HARDEN_BRANCH_PREDICTOR, + MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), + .enable = enable_psci_bp_hardening, + }, + { + .capability = ARM64_HARDEN_BRANCH_PREDICTOR, + MIDR_ALL_VERSIONS(MIDR_CORTEX_A72), + .enable = enable_psci_bp_hardening, + }, + { + .capability = ARM64_HARDEN_BRANCH_PREDICTOR, + MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), + .enable = enable_psci_bp_hardening, + }, + { + .capability = ARM64_HARDEN_BRANCH_PREDICTOR, + MIDR_ALL_VERSIONS(MIDR_CORTEX_A75), + .enable = enable_psci_bp_hardening, + }, +#endif { } };