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[v7,3/3] dts: arm64: Add mailbox binding for hi3660

Message ID 1521130058-24796-4-git-send-email-leo.yan@linaro.org (mailing list archive)
State New, archived
Headers show

Commit Message

Leo Yan March 15, 2018, 4:07 p.m. UTC 
From: Kaihua Zhong <zhongkaihua@huawei.com>

Add DT binding for mailbox driver.

Signed-off-by: Ruyi Wang <wangruyi@huawei.com>
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Wei Xu March 15, 2018, 4:41 p.m. UTC | #1 
Hi Leo,

On 2018/3/15 16:07, Leo Yan wrote:
> From: Kaihua Zhong <zhongkaihua@huawei.com>
> 
> Add DT binding for mailbox driver.
> 
> Signed-off-by: Ruyi Wang <wangruyi@huawei.com>
> Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>

Fine to me. Thanks!
Acked-by: Wei Xu <xuwei5@hisilicon.com>

Best Regards,
Wei

> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 63d4f9d..3788448 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -298,6 +298,14 @@
>  			#reset-cells = <2>;
>  		};
>  
> +		mailbox: mailbox@e896b000 {
> +			compatible = "hisilicon,hi3660-mbox";
> +			reg = <0x0 0xe896b000 0x0 0x1000>;
> +			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
> +			#mbox-cells = <3>;
> +		};
> +
>  		dual_timer0: timer@fff14000 {
>  			compatible = "arm,sp804", "arm,primecell";
>  			reg = <0x0 0xfff14000 0x0 0x1000>;
>
Leo Yan March 15, 2018, 11:44 p.m. UTC | #2 
On Thu, Mar 15, 2018 at 04:41:18PM +0000, Wei Xu wrote:
> Hi Leo,
> 
> On 2018/3/15 16:07, Leo Yan wrote:
> > From: Kaihua Zhong <zhongkaihua@huawei.com>
> > 
> > Add DT binding for mailbox driver.
> > 
> > Signed-off-by: Ruyi Wang <wangruyi@huawei.com>
> > Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
> 
> Fine to me. Thanks!
> Acked-by: Wei Xu <xuwei5@hisilicon.com>

Thanks, Wei.

> Best Regards,
> Wei
> 
> > ---
> >  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> > index 63d4f9d..3788448 100644
> > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> > @@ -298,6 +298,14 @@
> >  			#reset-cells = <2>;
> >  		};
> >  
> > +		mailbox: mailbox@e896b000 {
> > +			compatible = "hisilicon,hi3660-mbox";
> > +			reg = <0x0 0xe896b000 0x0 0x1000>;
> > +			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
> > +			#mbox-cells = <3>;
> > +		};
> > +
> >  		dual_timer0: timer@fff14000 {
> >  			compatible = "arm,sp804", "arm,primecell";
> >  			reg = <0x0 0xfff14000 0x0 0x1000>;
> > 
>
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 63d4f9d..3788448 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -298,6 +298,14 @@ 
 			#reset-cells = <2>;
 		};
 
+		mailbox: mailbox@e896b000 {
+			compatible = "hisilicon,hi3660-mbox";
+			reg = <0x0 0xe896b000 0x0 0x1000>;
+			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <3>;
+		};
+
 		dual_timer0: timer@fff14000 {
 			compatible = "arm,sp804", "arm,primecell";
 			reg = <0x0 0xfff14000 0x0 0x1000>;