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Wed, 21 Mar 2018 18:56:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521658591; bh=BP2NEOOSikWKnKxDi5MbxXs30YOknO4W7TIZoKbCnPE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lyb0z9XtIDzAdYvp668Y+jd5cXbawBx5ykdsuJhscZI3/HMpuIbq9rPXxKleBQRPZ QwbLyThS5JEMbLIHwO179azmuWG4ZTtby6TGpWZsfrNaD9P/YJQP18HRjhLuhTLrb7 U5VJm+CqU/oAxxCXJuZN+l39wX6Z9P7x0Z9Yz7g0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DBBD760FEB Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: jeffrey.t.kirsher@intel.com Subject: [PATCH REPOST v4 7/7] fm10k: Eliminate duplicate barriers on weakly-ordered archs Date: Wed, 21 Mar 2018 14:56:11 -0400 Message-Id: <1521658572-26354-8-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521658572-26354-1-git-send-email-okaya@codeaurora.org> References: <1521658572-26354-1-git-send-email-okaya@codeaurora.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180321_115643_487326_4A5506C7 X-CRM114-Status: GOOD ( 12.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sulrich@codeaurora.org, netdev@vger.kernel.org, timur@codeaurora.org, linux-kernel@vger.kernel.org, Sinan Kaya , intel-wired-lan@lists.osuosl.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya --- drivers/net/ethernet/intel/fm10k/fm10k_main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_main.c b/drivers/net/ethernet/intel/fm10k/fm10k_main.c index 8e12aae..eebef01 100644 --- a/drivers/net/ethernet/intel/fm10k/fm10k_main.c +++ b/drivers/net/ethernet/intel/fm10k/fm10k_main.c @@ -179,7 +179,7 @@ void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count) wmb(); /* notify hardware of new descriptors */ - writel(i, rx_ring->tail); + writel_relaxed(i, rx_ring->tail); } } @@ -1054,7 +1054,7 @@ static void fm10k_tx_map(struct fm10k_ring *tx_ring, /* notify HW of packet */ if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) { - writel(i, tx_ring->tail); + writel_relaxed(i, tx_ring->tail); /* we need this if more than one processor can write to our tail * at a time, it synchronizes IO on IA64/Altix systems