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Thu, 22 Mar 2018 16:26:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521736018; bh=Jj/zY1n26SVfCQz/fLdzinyyBEIG9Bq4GCSjYekipms=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AdzgddhdIVLyp8FkM1+fnmb5ipsGi48/gJlDuQtys9lX3NkRa1+aTSvXdn0Z7jmuX QEMJYs1hi1m0uerKzmJmMuDfS2lEmAvvLH34zrC3VA6+jXi0ucAEch91jqhbJHeyqe v4AtJozTvuMpLTd7Lg61lb+riDS3wEODAPvYy7Qg= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F34E760F78 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-rdma@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org Subject: [PATCH v5 2/3] RDMA/i40iw: Eliminate duplicate barriers on weakly-ordered archs Date: Thu, 22 Mar 2018 12:26:48 -0400 Message-Id: <1521736009-23387-3-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521736009-23387-1-git-send-email-okaya@codeaurora.org> References: <1521736009-23387-1-git-send-email-okaya@codeaurora.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180322_092705_357431_D999B427 X-CRM114-Status: GOOD ( 14.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Faisal Latif , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Sinan Kaya , Jason Gunthorpe , Doug Ledford , Shiraz Saleem , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Create a new wrapper function with relaxed write operator. Use the new wrapper when a write is following a wmb(). Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya --- drivers/infiniband/hw/i40iw/i40iw_ctrl.c | 6 ++++-- drivers/infiniband/hw/i40iw/i40iw_osdep.h | 1 + drivers/infiniband/hw/i40iw/i40iw_uk.c | 3 ++- drivers/infiniband/hw/i40iw/i40iw_utils.c | 11 +++++++++++ 4 files changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/infiniband/hw/i40iw/i40iw_ctrl.c b/drivers/infiniband/hw/i40iw/i40iw_ctrl.c index c74fd33..47f473e 100644 --- a/drivers/infiniband/hw/i40iw/i40iw_ctrl.c +++ b/drivers/infiniband/hw/i40iw/i40iw_ctrl.c @@ -706,9 +706,11 @@ static void i40iw_sc_ccq_arm(struct i40iw_sc_cq *ccq) wmb(); /* make sure shadow area is updated before arming */ if (ccq->dev->is_pf) - i40iw_wr32(ccq->dev->hw, I40E_PFPE_CQARM, ccq->cq_uk.cq_id); + i40iw_wr32_relaxed(ccq->dev->hw, I40E_PFPE_CQARM, + ccq->cq_uk.cq_id); else - i40iw_wr32(ccq->dev->hw, I40E_VFPE_CQARM1, ccq->cq_uk.cq_id); + i40iw_wr32_relaxed(ccq->dev->hw, I40E_VFPE_CQARM1, + ccq->cq_uk.cq_id); } /** diff --git a/drivers/infiniband/hw/i40iw/i40iw_osdep.h b/drivers/infiniband/hw/i40iw/i40iw_osdep.h index f27be3e..e06f4b9 100644 --- a/drivers/infiniband/hw/i40iw/i40iw_osdep.h +++ b/drivers/infiniband/hw/i40iw/i40iw_osdep.h @@ -213,5 +213,6 @@ void i40iw_hw_stats_start_timer(struct i40iw_sc_vsi *vsi); void i40iw_hw_stats_stop_timer(struct i40iw_sc_vsi *vsi); #define i40iw_mmiowb() mmiowb() void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value); +void i40iw_wr32_relaxed(struct i40iw_hw *hw, u32 reg, u32 value); u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg); #endif /* _I40IW_OSDEP_H_ */ diff --git a/drivers/infiniband/hw/i40iw/i40iw_uk.c b/drivers/infiniband/hw/i40iw/i40iw_uk.c index 8afa5a6..f936fc2 100644 --- a/drivers/infiniband/hw/i40iw/i40iw_uk.c +++ b/drivers/infiniband/hw/i40iw/i40iw_uk.c @@ -723,7 +723,8 @@ static void i40iw_cq_request_notification(struct i40iw_cq_uk *cq, wmb(); /* make sure WQE is populated before valid bit is set */ - writel(cq->cq_id, cq->cqe_alloc_reg); + writel_relaxed(cq->cq_id, cq->cqe_alloc_reg); + mmiowb(); } /** diff --git a/drivers/infiniband/hw/i40iw/i40iw_utils.c b/drivers/infiniband/hw/i40iw/i40iw_utils.c index ddc1056..99aa6f8 100644 --- a/drivers/infiniband/hw/i40iw/i40iw_utils.c +++ b/drivers/infiniband/hw/i40iw/i40iw_utils.c @@ -125,6 +125,17 @@ inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value) } /** + * i40iw_wr32_relaxed - write 32 bits to hw register without ordering + * @hw: hardware information including registers + * @reg: register offset + * @value: vvalue to write to register + */ +inline void i40iw_wr32_relaxed(struct i40iw_hw *hw, u32 reg, u32 value) +{ + writel_relaxed(value, hw->hw_addr + reg); +} + +/** * i40iw_rd32 - read a 32 bit hw register * @hw: hardware information including registers * @reg: register offset