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Thu, 22 Mar 2018 17:10:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521738611; bh=UFFOJEvdJGTDlskSZ9RxFXJXMm/Hcw+E4NHzfNse+5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=COHIHoFj89iM6DDuBlALBAlIKNN7t793RT79+6ng1ALeu3BMZtY+axSKMav9pu/yM aW1daSkx0p9CE9qiy04RLhBLNxLoTnJbGJotZRLECse5uZsIjQlyQfpvgjw1A9oDMQ GxL8R/DjHgxlS7zI9czdtW0LKY5ujgT0xiU6jgcY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 69B7C60F6C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: netdev@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org Subject: [PATCH v5 2/5] qlcnic: Eliminate duplicate barriers on weakly-ordered archs Date: Thu, 22 Mar 2018 13:09:59 -0400 Message-Id: <1521738603-23596-3-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521738603-23596-1-git-send-email-okaya@codeaurora.org> References: <1521738603-23596-1-git-send-email-okaya@codeaurora.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180322_101019_580780_67FB38EC X-CRM114-Status: GOOD ( 13.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dept-GELinuxNICDev@cavium.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Sinan Kaya , Harish Patil , linux-arm-kernel@lists.infradead.org, Manish Chopra Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya Acked-by: Manish Chopra --- drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c index 46b0372..97c146e7 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c @@ -478,7 +478,7 @@ irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *adapter) wmb(); /* clear the interrupt trigger control register */ - writel(0, adapter->isr_int_vec); + writel_relaxed(0, adapter->isr_int_vec); intr_val = readl(adapter->isr_int_vec); do { intr_val = readl(adapter->tgt_status_reg);