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MIPS: io: add a barrier after readX()

Message ID 1522692633-24304-1-git-send-email-okaya@codeaurora.org (mailing list archive)
State New, archived
Headers show

Commit Message

Sinan Kaya April 2, 2018, 6:10 p.m. UTC 
While a barrier is present in writeX() function before the register write,
a similar barrier is missing in the readX() function after the register
read. This could allow register accesses following readX() to observe
stale data.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/mips/include/asm/io.h | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 0cbf3af..7f9068d 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -377,6 +377,7 @@  static inline type pfx##read##bwlq(const volatile void __iomem *mem)	\
 		BUG();							\
 	}								\
 									\
+	war_io_reorder_wmb();						\
 	return pfx##ioswab##bwlq(__mem, __val);				\
 }