From patchwork Thu Apr 19 11:19:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Stefan Wahren X-Patchwork-Id: 10349647 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 919D36023A for ; Thu, 19 Apr 2018 11:21:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 80C9D2881A for ; Thu, 19 Apr 2018 11:21:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7331C289BA; Thu, 19 Apr 2018 11:21:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BD3BC2881A for ; Thu, 19 Apr 2018 11:21:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=q0y6jcVi6KB03+r1aYhtYtOk1tR23CVDoAq0V6VAF5U=; b=cuXqJV9qjcG58c vL0LdsvWx2mAIUEpydUH+fl7Cf+DS604DAxSgGVTuVm3mTqmykcM6JPhzzgaSaY6KM9WwhbeN++oi wTuKg5CBMsTa4qyi2OAbOacovJ2BUM5DzFiC12Z94tMREfJ6aonuOKGc2Q8oBOf0/lkAsMSkdPScQ rqMZVVmx0U53wlfohhugjrMN0YdIefDGnzRdRAaUXZQ/k9rjx4/4IAniRmocQ4OI//RBlQFYIaoog P2UnlMZDyKkT8E45KBb1BfhtFiilY7JtMgOH+Qh2rh1yCOkK7GCc1lErWG3vb0vmW5iqVarfVxDyB TJJ160uLYU8i6rc0vrFA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1f97cw-0006az-B6; Thu, 19 Apr 2018 11:21:22 +0000 Received: from mout.kundenserver.de ([212.227.17.13]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1f97c1-0005Ft-LI for linux-arm-kernel@lists.infradead.org; Thu, 19 Apr 2018 11:20:30 +0000 Received: from localhost.localdomain ([95.90.209.130]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LmcE7-1easqr3qiZ-00aCLw; Thu, 19 Apr 2018 13:20:07 +0200 From: Stefan Wahren To: Shawn Guo , Sascha Hauer , Fabio Estevam Subject: [PATCH] ARM: dts: imx6ull: add UART5 RTS input select register Date: Thu, 19 Apr 2018 13:19:39 +0200 Message-Id: <1524136779-13246-1-git-send-email-stefan.wahren@i2se.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Provags-ID: V03:K1:fLdcpgQaKuQshFnfGA+beoy8CE7GftqWnmm4yvBeuwAb+e+iXJf WBcgVW2xstHCg7YTUQrnSUQakiio4F2dLBLmhcy6MemmTPxyb8Uh/U+33L8yMg4LL/9pnPC YAFRVeQVl9ytT28Y5SW5cH+xWHrjMWALZlAMVHsuD/rXWWjtwnlJZ283ierNe6cHJE52tuJ hbm89AyG9ONBbT1c/s8Lg== X-UI-Out-Filterresults: notjunk:1; V01:K0:CVOJx6KeBRE=:tObT+DzM0MCQMvbm3zrH7q 3oOD4LVYE5UT9fIDNKJ34ZmhYpe3YgbaocAi8sAAByAljmE0xakAax2dQPeyfWPx2yETgmT2C Q0Tu3lkxDeEHSvnb+tuPYZPMetcbSgTmaRtgcYMMjqV3saFeshCB7h7w3b8yApWIliCGBWOTq sJrZHyqHtGv9VXuHmOKphkA6R9Ao2xnWTJYoQsduky2/2W2hfYa9dT5jCdBFG7jocDthy7Jmx S6I2muS7nlu7JixCpUbFarYWxcRoJ2fWdJBJiUizD1vhRKN067lZ457QStt4MrsAWTVK2eFRt 80ukLOZxi8+zfyMDlG6EmsQVed+ITjj4llMtKuZys/oBXY7mBLrjW0ceg8YExR7z0QNDMe0Rw FC5eq0BnwRonMnuWUu4KKl+8/Z1dvw+H6Yt/Gkx2J1yaldjulqgkqeXUH5dDA5c/orkF82soj YWo6Ueu7PynYp0asp25lPH9ylr9ELDYf0HQnmZmZCbWf6PqCERvgVLTC0oIlavSHJ24A0G9gb 6NxAKi6kLzx0/JxOF7hwQbdrA4JWy2dWyM/Q7uFwGQYYXpJquKSCFGQUhmlFFnmxQ237HXl/T 4rFGDQRy5ZHulGasLT3/iHQpPfBpppoRw72kdIayxPdb7RbWuJB90AZ9Vo1UjdeJQbl8DGAsl jLP0vlFXJu/rxG3MuKz56EVlzlCsr5HusUk2f3VyOR5KAb4E3gtceonppdlwVbjsoCsC7PBTK WDjFGoBjNSuc7k9kBrzjcMVyHnhw6Uc6Wqk2/oSwW08icu7DXswvmUrPEF0= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180419_042026_079417_75277826 X-CRM114-Status: GOOD ( 12.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Wahren , devicetree@vger.kernel.org, Greg Ungerer , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The iMX6ULL UART5_RTS_B_DATA_SELECT_INPUT DAISY Register has some different bit definitions to that same register in the i.MX6UL. The bits for the i.MX6UL: 000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8 001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8 010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8 011 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1 100 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1 101 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8 But for the i.MX6ULL: 000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8 001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8 010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8 011 UART1_CTS_B_ALT9 — Selecting Pad: UART1_CTS_B for Mode: ALT9 100 UART1_RTS_B_ALT9 — Selecting Pad: UART1_RTS_B for Mode: ALT9 101 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1 110 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1 111 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8 Signed-off-by: Stefan Wahren Acked-by: Rob Herring --- arch/arm/boot/dts/imx6ull-pinfunc.h | 5 +++++ 1 file changed, 5 insertions(+) Hi Shawn, in the lack of a suitable board, this is only compile tested. Stefan diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h b/arch/arm/boot/dts/imx6ull-pinfunc.h index 090846b..fdc46bb 100644 --- a/arch/arm/boot/dts/imx6ull-pinfunc.h +++ b/arch/arm/boot/dts/imx6ull-pinfunc.h @@ -16,8 +16,12 @@ */ #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5 +#define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_RTS 0x008C 0x0318 0x0640 0x9 0x3 +#define MX6ULL_PAD_UART1_RTS_B__UART5_DTE_RTS 0x0090 0x031C 0x0640 0x9 0x4 #define MX6ULL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6 #define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7 +#define MX6ULL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5 +#define MX6ULL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6 #define MX6ULL_PAD_ENET2_RX_DATA0__EPDC_SDDO08 0x00E4 0x0370 0x0000 0x9 0x0 #define MX6ULL_PAD_ENET2_RX_DATA1__EPDC_SDDO09 0x00E8 0x0374 0x0000 0x9 0x0 #define MX6ULL_PAD_ENET2_RX_EN__EPDC_SDDO10 0x00EC 0x0378 0x0000 0x9 0x0 @@ -51,6 +55,7 @@ #define MX6ULL_PAD_CSI_DATA00__ESAI_TX_HF_CLK 0x01E4 0x0470 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA01__ESAI_RX_HF_CLK 0x01E8 0x0474 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA02__ESAI_RX_FS 0x01EC 0x0478 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7 #define MX6ULL_PAD_CSI_DATA03__ESAI_RX_CLK 0x01F0 0x047C 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0