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Received: from esa1.microchip.iphmx.com ([68.232.147.91]) by casper.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fMBwC-0005EH-It for linux-arm-kernel@lists.infradead.org; Fri, 25 May 2018 12:35:19 +0000 X-IronPort-AV: E=Sophos;i="5.49,440,1520924400"; d="scan'208";a="15314122" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 25 May 2018 05:35:00 -0700 Received: from rob-ult-m19940.mchp-main.com (10.10.76.4) by chn-sv-exch02.mchp-main.com (10.10.76.38) with Microsoft SMTP Server id 14.3.352.0; Fri, 25 May 2018 05:35:00 -0700 From: Codrin Ciubotariu To: , , , , , , , , , Subject: [PATCH v4 1/7] dt-bindings: clk: at91: add an I2S mux clock Date: Fri, 25 May 2018 15:34:22 +0300 Message-ID: <1527251668-31396-2-git-send-email-codrin.ciubotariu@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527251668-31396-1-git-send-email-codrin.ciubotariu@microchip.com> References: <1527251668-31396-1-git-send-email-codrin.ciubotariu@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180525_133516_902006_6E8CB556 X-CRM114-Status: GOOD ( 10.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cristian.Birsan@microchip.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The I2S mux clock can be used to select the I2S input clock. The available parents are the peripheral and the generated clocks. Signed-off-by: Codrin Ciubotariu --- .../devicetree/bindings/clock/at91-clock.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt index 51c259a..1c46b3c 100644 --- a/Documentation/devicetree/bindings/clock/at91-clock.txt +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt @@ -90,6 +90,8 @@ Required properties: "atmel,sama5d2-clk-audio-pll-pmc" at91 audio pll output on AUDIOPLLCLK that feeds the PMC and can be used by peripheral clock or generic clock + "atmel,sama5d2-clk-i2s-mux": + at91 I2S clock source selection Required properties for SCKC node: - reg : defines the IO memory reserved for the SCKC. @@ -507,3 +509,35 @@ For example: atmel,clk-output-range = <0 83000000>; }; }; + +Required properties for I2S mux clocks: +- #size-cells : shall be 0 (reg is used to encode I2S bus id). +- #address-cells : shall be 1 (reg is used to encode I2S bus id). +- name: device tree node describing a specific mux clock. + * #clock-cells : from common clock binding; shall be set to 0. + * clocks : shall be the mux clock parent phandles; shall be 2 phandles: + peripheral and generated clock; the first phandle shall belong to the + peripheral clock and the second one shall belong to the generated + clock; "clock-indices" property can be user to specify + the correct order. + * reg: I2S bus id of the corresponding mux clock. + e.g. reg = <0>; for i2s0, reg = <1>; for i2s1 + +For example: + i2s_clkmux { + compatible = "atmel,sama5d2-clk-i2s-mux"; + #address-cells = <1>; + #size-cells = <0>; + + i2s0muxck: i2s0_muxclk { + clocks = <&i2s0_clk>, <&i2s0_gclk>; + #clock-cells = <0>; + reg = <0>; + }; + + i2s1muxck: i2s1_muxclk { + clocks = <&i2s1_clk>, <&i2s1_gclk>; + #clock-cells = <0>; + reg = <1>; + }; + };