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Sun, 3 Jun 2018 03:04:28 +0000 From: Anson Huang To: shawnguo@kernel.org, kernel@pengutronix.de, fabio.estevam@nxp.com, mturquette@baylibre.com, sboyd@kernel.org Subject: [PATCH 2/4] clk: imx6sl: remove clks_init_on array Date: Sun, 3 Jun 2018 11:00:45 +0800 Message-Id: <1527994847-2363-2-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527994847-2363-1-git-send-email-Anson.Huang@nxp.com> References: <1527994847-2363-1-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: HK2PR0401CA0003.apcprd04.prod.outlook.com (2603:1096:202:2::13) To HE1PR04MB1323.eurprd04.prod.outlook.com (2a01:111:e400:5889::13) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(48565401081)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020); SRVR:HE1PR04MB1323; X-Microsoft-Exchange-Diagnostics: 1; HE1PR04MB1323; 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Signed-off-by: Anson Huang --- drivers/clk/imx/clk-imx6sl.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c index 66b1dd1..eb6bcbf 100644 --- a/drivers/clk/imx/clk-imx6sl.c +++ b/drivers/clk/imx/clk-imx6sl.c @@ -104,10 +104,6 @@ static struct clk_onecell_data clk_data; static void __iomem *ccm_base; static void __iomem *anatop_base; -static const u32 clks_init_on[] __initconst = { - IMX6SL_CLK_IPG, IMX6SL_CLK_ARM, IMX6SL_CLK_MMDC_ROOT, -}; - /* * ERR005311 CCM: After exit from WAIT mode, unwanted interrupt(s) taken * during WAIT mode entry process could cause cache memory @@ -195,7 +191,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) { struct device_node *np; void __iomem *base; - int i; int ret; clks[IMX6SL_CLK_DUMMY] = imx_clk_fixed("dummy", 0); @@ -426,13 +421,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) pr_warn("%s: failed to set AHB clock rate %d!\n", __func__, ret); - /* - * Make sure those always on clocks are enabled to maintain the correct - * usecount and enabling/disabling of parent PLLs. - */ - for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) - clk_prepare_enable(clks[clks_init_on[i]]); - if (IS_ENABLED(CONFIG_USB_MXS_PHY)) { clk_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]); clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);