From patchwork Tue Jun 12 13:14:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic BARRE X-Patchwork-Id: 10460223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BB221602A0 for ; Tue, 12 Jun 2018 13:18:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AAC3828780 for ; Tue, 12 Jun 2018 13:18:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9F2B228782; Tue, 12 Jun 2018 13:18:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D9B4128786 for ; Tue, 12 Jun 2018 13:18:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=PemlULfrg1kBjniaGmm9rcyZ0t9ZX6B7k7r/grlFpEo=; b=ar+HcPRNv0dkei DGOvb8xh3yeB4aWNYty986UM2ekVMJM+5IRFhabOMKhxzo+xUS3oBuIG7nfuErQis99uygqt316zr /ltqeP/lqD28P3QdOzs5/j/I0UfQqrpGDXAP8tDGhOs54LCmrMKAsgt9d+1n9Sa+YFr3KvFtEwnDE lDeSwYrC695vvoJ4w61Y4mtlcfexzqQe0BV+d+mRZ9A6I4sMZ8eS23d6GsgqoIYpU8VQ/3kjXaPt8 RE6EDw/YttaRMj/pwta43pTsZ0DPlghNrvrks+fIIRLX7X6X9+uE0sDniM7E5LDouPCergtVPMf4t JxQzbMgFBEebbeBd73kw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fSjBB-0007X5-73; Tue, 12 Jun 2018 13:17:45 +0000 Received: from mx07-00178001.pphosted.com ([62.209.51.94]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fSj9e-0006H9-6l for linux-arm-kernel@lists.infradead.org; Tue, 12 Jun 2018 13:16:17 +0000 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w5CDDxlX014673; Tue, 12 Jun 2018 15:15:56 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2jjefgg4n5-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 12 Jun 2018 15:15:56 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BA9143A; Tue, 12 Jun 2018 13:15:55 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 79A62A546; Tue, 12 Jun 2018 13:15:55 +0000 (GMT) Received: from SAFEX1HUBCAS21.st.com (10.75.90.44) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 12 Jun 2018 15:15:55 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 12 Jun 2018 15:15:55 +0200 From: Ludovic Barre To: Ulf Hansson , Rob Herring Subject: [PATCH 05/19] mmc: mmci: allow to overwrite clock/power procedure to specific variant Date: Tue, 12 Jun 2018 15:14:26 +0200 Message-ID: <1528809280-31116-6-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528809280-31116-1-git-send-email-ludovic.Barre@st.com> References: <1528809280-31116-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-12_01:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180612_061610_620717_507B36DE X-CRM114-Status: GOOD ( 16.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Alexandre Torgue , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Ludovic Barre , Maxime Coquelin , Gerald Baeza , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ludovic Barre A specific variant could have different power or clock procedures. This patch allows to overwrite the default mmci_set_clkreg and mmci_set_pwrreg for a specific variant. Signed-off-by: Ludovic Barre --- drivers/mmc/host/mmci.c | 96 +++++++++++++++++++++++++++++-------------------- drivers/mmc/host/mmci.h | 7 ++++ 2 files changed, 64 insertions(+), 39 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index ede95b7..801c86b 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -374,6 +374,52 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) mmci_write_clkreg(host, clk); } +static void mmci_set_pwrreg(struct mmci_host *host, unsigned char power_mode, + unsigned int pwr) +{ + struct variant_data *variant = host->variant; + struct mmc_host *mmc = host->mmc; + + switch (power_mode) { + case MMC_POWER_OFF: + if (!IS_ERR(mmc->supply.vmmc)) + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); + + if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { + regulator_disable(mmc->supply.vqmmc); + host->vqmmc_enabled = false; + } + + break; + case MMC_POWER_UP: + if (!IS_ERR(mmc->supply.vmmc)) + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, + mmc->ios.vdd); + + /* + * The ST Micro variant doesn't have the PL180s MCI_PWR_UP + * and instead uses MCI_PWR_ON so apply whatever value is + * configured in the variant data. + */ + pwr |= variant->pwrreg_powerup; + + break; + case MMC_POWER_ON: + if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { + if (regulator_enable(mmc->supply.vqmmc) < 0) + dev_err(mmc_dev(mmc), + "failed to enable vqmmc regulator\n"); + else + host->vqmmc_enabled = true; + } + + pwr |= MCI_PWR_ON; + break; + } + + mmci_write_pwrreg(host, pwr); +} + static void mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) { @@ -1031,7 +1077,7 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) { struct mmci_host *host = mmc_priv(mmc); struct variant_data *variant = host->variant; - u32 pwr = 0; + unsigned int pwr = 0; unsigned long flags; int ret; @@ -1039,42 +1085,6 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) host->plat->ios_handler(mmc_dev(mmc), ios)) dev_err(mmc_dev(mmc), "platform ios_handler failed\n"); - switch (ios->power_mode) { - case MMC_POWER_OFF: - if (!IS_ERR(mmc->supply.vmmc)) - mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); - - if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { - regulator_disable(mmc->supply.vqmmc); - host->vqmmc_enabled = false; - } - - break; - case MMC_POWER_UP: - if (!IS_ERR(mmc->supply.vmmc)) - mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); - - /* - * The ST Micro variant doesn't have the PL180s MCI_PWR_UP - * and instead uses MCI_PWR_ON so apply whatever value is - * configured in the variant data. - */ - pwr |= variant->pwrreg_powerup; - - break; - case MMC_POWER_ON: - if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { - ret = regulator_enable(mmc->supply.vqmmc); - if (ret < 0) - dev_err(mmc_dev(mmc), - "failed to enable vqmmc regulator\n"); - else - host->vqmmc_enabled = true; - } - - pwr |= MCI_PWR_ON; - break; - } if (variant->signal_direction && ios->power_mode != MMC_POWER_OFF) { /* @@ -1126,8 +1136,16 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) spin_lock_irqsave(&host->lock, flags); - mmci_set_clkreg(host, ios->clock); - mmci_write_pwrreg(host, pwr); + if (variant->set_clkreg) + variant->set_clkreg(host, ios->clock); + else + mmci_set_clkreg(host, ios->clock); + + if (variant->set_pwrreg) + variant->set_pwrreg(host, ios->power_mode, pwr); + else + mmci_set_pwrreg(host, ios->power_mode, pwr); + mmci_reg_delay(host); spin_unlock_irqrestore(&host->lock, flags); diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 2ba9640..7265ca6 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -231,6 +231,7 @@ struct clk; struct dma_chan; +struct mmci_host; /** * struct variant_data - MMCI variant-specific quirks @@ -273,6 +274,8 @@ struct dma_chan; * register. * @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register * @mmci_dma: Pointer to platform-specific DMA callbacks. + * @set_clk_ios: if clock procedure of variant is specific + * @set_pwr_ios: if power procedure of variant is specific */ struct variant_data { unsigned int clkreg; @@ -307,6 +310,9 @@ struct variant_data { u32 start_err; u32 opendrain; struct mmci_dma_ops *mmci_dma; + void (*set_clkreg)(struct mmci_host *host, unsigned int desired); + void (*set_pwrreg)(struct mmci_host *host, unsigned char power_mode, + unsigned int pwr); }; struct mmci_host { @@ -328,6 +334,7 @@ struct mmci_host { u32 pwr_reg; u32 pwr_reg_add; u32 clk_reg; + u32 clk_reg_add; u32 datactrl_reg; u32 busy_status; u32 mask1_reg;