diff mbox

[2/2] ARM: dts: imx6sll: add gpio clocks

Message ID 1529649154-5724-2-git-send-email-Anson.Huang@nxp.com (mailing list archive)
State New, archived
Headers show

Commit Message

Anson Huang June 22, 2018, 6:32 a.m. UTC
i.MX6SLL has GPIO clock gates in CCM CCGR, add
clock property for GPIO driver to make sure all
GPIO banks work as expected.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm/boot/dts/imx6sll.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Fabio Estevam June 23, 2018, 3:49 p.m. UTC | #1
On Fri, Jun 22, 2018 at 3:32 AM, Anson Huang <Anson.Huang@nxp.com> wrote:
> i.MX6SLL has GPIO clock gates in CCM CCGR, add
> clock property for GPIO driver to make sure all
> GPIO banks work as expected.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Shawn Guo July 12, 2018, 2:52 a.m. UTC | #2
On Fri, Jun 22, 2018 at 02:32:34PM +0800, Anson Huang wrote:
> i.MX6SLL has GPIO clock gates in CCM CCGR, add
> clock property for GPIO driver to make sure all
> GPIO banks work as expected.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

I tried to create a topic branch for this patch with dependent clk
branch merged in.  But it turns out to be difficult and not worth the
effort, because too many imx6sll patches need to be moved out from
imx/dt branch, and some imx6sll changes are mixed with other SoCs.
Let's apply this in next cycle.  Ping me when 4.19-rc1 is available.

Shawn
Anson Huang Aug. 29, 2018, 1:12 a.m. UTC | #3
Hi, Shawn
	I saw v4.19-rc1 is created, can you please apply this patch?

Anson Huang
Best Regards!


> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Thursday, July 12, 2018 10:52 AM
> To: Anson Huang <anson.huang@nxp.com>
> Cc: s.hauer@pengutronix.de; kernel@pengutronix.de; Fabio Estevam
> <fabio.estevam@nxp.com>; robh+dt@kernel.org; mark.rutland@arm.com;
> mturquette@baylibre.com; sboyd@kernel.org; A.s. Dong
> <aisheng.dong@nxp.com>; Jacky Bai <ping.bai@nxp.com>; dl-linux-imx
> <linux-imx@nxp.com>; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-clk@vger.kernel.org
> Subject: Re: [PATCH 2/2] ARM: dts: imx6sll: add gpio clocks
> 
> On Fri, Jun 22, 2018 at 02:32:34PM +0800, Anson Huang wrote:
> > i.MX6SLL has GPIO clock gates in CCM CCGR, add clock property for GPIO
> > driver to make sure all GPIO banks work as expected.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> 
> I tried to create a topic branch for this patch with dependent clk branch merged
> in.  But it turns out to be difficult and not worth the effort, because too many
> imx6sll patches need to be moved out from imx/dt branch, and some imx6sll
> changes are mixed with other SoCs.
> Let's apply this in next cycle.  Ping me when 4.19-rc1 is available.
> 
> Shawn
Shawn Guo Aug. 29, 2018, 2:30 p.m. UTC | #4
On Wed, Aug 29, 2018 at 01:12:04AM +0000, Anson Huang wrote:
> Hi, Shawn
> 	I saw v4.19-rc1 is created, can you please apply this patch?
> 

Applied.  Thanks for reminding.

Shawn
diff mbox

Patch

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index c9b0ccc..116f561 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -375,6 +375,7 @@ 
 				reg = <0x0209c000 0x4000>;
 				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_GPIO1>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
@@ -386,6 +387,7 @@ 
 				reg = <0x020a0000 0x4000>;
 				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_GPIO2>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
@@ -397,6 +399,7 @@ 
 				reg = <0x020a4000 0x4000>;
 				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_GPIO3>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
@@ -408,6 +411,7 @@ 
 				reg = <0x020a8000 0x4000>;
 				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_GPIO4>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
@@ -419,6 +423,7 @@ 
 				reg = <0x020ac000 0x4000>;
 				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_GPIO5>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
@@ -430,6 +435,7 @@ 
 				reg = <0x020b0000 0x4000>;
 				interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_GPIO6>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;