From patchwork Thu Aug 9 08:22:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianxin Pan X-Patchwork-Id: 10561083 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AA05C13B4 for ; Thu, 9 Aug 2018 08:23:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 92CCF2A68C for ; Thu, 9 Aug 2018 08:23:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 86CDB2AA34; Thu, 9 Aug 2018 08:23:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F02722A68C for ; Thu, 9 Aug 2018 08:23:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0Ot2GWSiLI7iZAOAkV5D2VPaKwCYaAxxuFwtA2Pzctg=; b=k/PktaQ2m31L/n aDtlCXw7ur8uMFSbmbypjzfJ3rKpI370ChvETr3OMuuTFjHq0Vbc+OIlZtUGLgWXdNfUcN6N/oAQe MVaZDUVri/0/UAqHebSzrDaqUcX3sjDQ++BIOnhA7SNBIlrBoB1GqyOsqAoeSkG0yhOsSaU63tGsN /9ElJZCG8Za2tEfxYDKD5SLPylr+hdXEI/JyfI9VMrT9XeZgr82eftY9BRdb/1pQiACXVZgCBLzt1 ejC3T3rs/NC2LNdZWE71TRmz4WMpLKjw5afcMOxAN3sa7Eya65O4w8w04LnzhkWSEgqY3RRI8NppD bRbQw4/hkNJzRL6LARgw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fngEQ-0001p3-Ih; Thu, 09 Aug 2018 08:23:42 +0000 Received: from merlin.infradead.org ([2001:8b0:10b:1231::1]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fngEN-0001kW-2M; Thu, 09 Aug 2018 08:23:39 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=jKZ00TDmt3k+dmiTaNdnhiT2KLdSx1TAGbSupA0NUTk=; b=DR0kEKqcBFILeOgCGm3CPD+I0 oeTcc3+gNTDByqdfOabvxhdO2SAHO6Ba0Kh6AcvrRN0fALQmGR5Qo/eV7HqcpyfKhf6CuB3qKTa6G hUXV7VBGWfPtgV+5n2+PHfCdqyINGRCcuBwzmoAaT4wwr4yfSVCNXQiWlqnypuL9MqMalocy/tFMz /tEaqn33YYWdrF0KgTREZtXHNycQvgbqkzY8dsquJSwLyf9MmW7CuwPGw7lZKnscCRSFudGyCYhNW HMpLfcoy8EZbbAXokViF0UGsgPHtCILBt6qXNUjs4HrHtDWXnmLO4V9QozoSFuqtLy8f/obQeW19M Nj2wL6QZA==; Received: from mail-sh2.amlogic.com ([58.32.228.45]) by merlin.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fngEJ-0008BS-PB; Thu, 09 Aug 2018 08:23:37 +0000 Received: from droid02.amlogic.com (10.18.11.217) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Thu, 9 Aug 2018 16:22:23 +0800 From: Jianxin Pan To: Kevin Hilman , Subject: [PATCH 2/2] arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support Date: Thu, 9 Aug 2018 16:22:31 +0800 Message-ID: <1533802951-49919-3-git-send-email-jianxin.pan@amlogic.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1533802951-49919-1-git-send-email-jianxin.pan@amlogic.com> References: <1533802951-49919-1-git-send-email-jianxin.pan@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.11.217] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180809_042336_250303_789BE9FA X-CRM114-Status: GOOD ( 14.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Hanjie Lin , Victor Wan , Jianxin Pan , Neil Armstrong , Yixun Lan , linux-kernel@vger.kernel.org, Rob Herring , Jian Hu , Carlo Caione , linux-arm-kernel@lists.infradead.org, Jerome Brunet Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 22 +++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 174 ++++++++++++++++++++++++ 3 files changed, 197 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index a97c0e2..c31f29d6 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts new file mode 100644 index 0000000..d267a37 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "meson-g12a.dtsi" + +/ { + compatible = "amlogic,u200", "amlogic,g12a"; + model = "Amlogic Meson G12A U200 Development Board"; + + aliases { + serial0 = &uart_AO; + }; +}; + +&uart_AO { + status = "okay"; +}; + diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi new file mode 100644 index 0000000..64a0f2e --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -0,0 +1,174 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +#include +#include +#include + +/ { + compatible = "amlogic,g12a"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@5000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + apb: apb@ffe00000 { + compatible = "simple-bus"; + reg = <0x0 0xffe00000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; + }; + + cbus: bus@ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + + }; + + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + hiubus: bus@ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + + }; + + periphs: periphs@ff634000 { + compatible = "simple-bus"; + reg = <0x0 0xff634000 0x0 0x2000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; + }; + + aobus: bus@ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial@3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = ; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial@4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = ; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + }; + }; +};