Message ID | 1535014731-64472-4-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add SYS-DMAC/INTC-EX/[H]SCIF/EAVB/RWDT support | expand |
On Thu, Aug 23, 2018 at 09:58:49AM +0100, Biju Das wrote: > Add support for the Interrupt Controller for External Devices > (INTC-EX) on RZ/G2M. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Thanks, This looks fine to me but I will wait to see if there are other reviews before applying. Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
On Fri, Aug 24, 2018 at 10:55:13AM +0200, Simon Horman wrote: > On Thu, Aug 23, 2018 at 09:58:49AM +0100, Biju Das wrote: > > Add support for the Interrupt Controller for External Devices > > (INTC-EX) on RZ/G2M. > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > > Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > Thanks, > > This looks fine to me but I will wait to see if there are other reviews > before applying. Thanks again, applied for v4.20.
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index 81fba7f..15d7785 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -144,6 +144,22 @@ #power-domain-cells = <1>; }; + intc_ex: interrupt-controller@e61c0000 { + compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0 0xe61c0000 0 0x200>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 407>; + power-domains = <&sysc 32>; + resets = <&cpg 407>; + }; + hscif0: serial@e6540000 { compatible = "renesas,hscif-r8a774a1", "renesas,rcar-gen3-hscif",