diff mbox series

[PATCH/RFT] arm64: dts: renesas: r8a77995-draak: Add MSIOF ch2 pins support

Message ID 1536092527-5950-1-git-send-email-ykaneko0929@gmail.com (mailing list archive)
State New, archived
Headers show
Series [PATCH/RFT] arm64: dts: renesas: r8a77995-draak: Add MSIOF ch2 pins support | expand

Commit Message

Yoshihiro Kaneko Sept. 4, 2018, 8:22 p.m. UTC
From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>

This patch adds support for MSIOF ch2 pinctrl to use the LVDS Control
Connector (CN41) for the Draak board on the R8A77995 SoC.

Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[ykaneko0929@gmail.com: deleted the unused reference to 'msiof_ref_clk']
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
---

This patch is based on the devel branch of Simon Horman's renesas tree.

 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Geert Uytterhoeven Sept. 5, 2018, 3:45 p.m. UTC | #1
Hi Kaneko-san,

On Tue, Sep 4, 2018 at 10:22 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote:
> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
>
> This patch adds support for MSIOF ch2 pinctrl to use the LVDS Control
> Connector (CN41) for the Draak board on the R8A77995 SoC.
>
> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [ykaneko0929@gmail.com: deleted the unused reference to 'msiof_ref_clk']
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Minor nit below.

> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts

> @@ -371,3 +377,10 @@
>                 };
>         };
>  };
> +
> +&msiof2 {

Please insert following alphabetical order.

> +       pinctrl-0 = <&msiof2_pins>;
> +       pinctrl-names = "default";
> +       /* In case of using this node, please enable this property */

I think this deserves some explanation about CN41.

> +       /* status = "okay"; */
> +};

Gr{oetje,eeting}s,

                        Geert
Simon Horman Sept. 6, 2018, 9:18 a.m. UTC | #2
On Wed, Sep 05, 2018 at 05:22:07AM +0900, Yoshihiro Kaneko wrote:
> From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> 
> This patch adds support for MSIOF ch2 pinctrl to use the LVDS Control
> Connector (CN41) for the Draak board on the R8A77995 SoC.
> 
> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [ykaneko0929@gmail.com: deleted the unused reference to 'msiof_ref_clk']
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>

Hi Kaneko-san,

sorry about this but I think we should drop this patch as
it is my understanding that msiof2 is not used on the Draak board.

> ---
> 
> This patch is based on the devel branch of Simon Horman's renesas tree.
> 
>  arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> index a8e8f26..e60b1e4 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> @@ -135,6 +135,12 @@
>  		function = "i2c1";
>  	};
>  
> +	msiof2_pins: spi2 {
> +		groups = "msiof2_clk", "msiof2_sync_b",
> +			 "msiof2_rxd",  "msiof2_txd";
> +		function = "msiof2";
> +	};
> +
>  	pwm0_pins: pwm0 {
>  		groups = "pwm0_c";
>  		function = "pwm0";
> @@ -371,3 +377,10 @@
>  		};
>  	};
>  };
> +
> +&msiof2 {
> +	pinctrl-0 = <&msiof2_pins>;
> +	pinctrl-names = "default";
> +	/* In case of using this node, please enable this property */
> +	/* status = "okay"; */
> +};
> -- 
> 1.9.1
>
Geert Uytterhoeven Sept. 6, 2018, 9:26 a.m. UTC | #3
Hi Simon,

On Thu, Sep 6, 2018 at 11:18 AM Simon Horman <horms@verge.net.au> wrote:
> On Wed, Sep 05, 2018 at 05:22:07AM +0900, Yoshihiro Kaneko wrote:
> > From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> >
> > This patch adds support for MSIOF ch2 pinctrl to use the LVDS Control
> > Connector (CN41) for the Draak board on the R8A77995 SoC.
> >
> > Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > [ykaneko0929@gmail.com: deleted the unused reference to 'msiof_ref_clk']
> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
>
> Hi Kaneko-san,
>
> sorry about this but I think we should drop this patch as
> it is my understanding that msiof2 is not used on the Draak board.

The connector is described in the Hardware Manual as "LVDS CONT connector"
in the LVDS chaper, but it is not clear to me what exactly is supposed to
be connected to it, and how standard it is.
Laurent: do you know more?

Note that Ebisu has the same connector, but the signals are shared with
SW4, making them mutually exclusive.
The Ebisu Hardware Manual does mention the connector, but not in the
Display Output (LVDS) chapter.

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index a8e8f26..e60b1e4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -135,6 +135,12 @@ 
 		function = "i2c1";
 	};
 
+	msiof2_pins: spi2 {
+		groups = "msiof2_clk", "msiof2_sync_b",
+			 "msiof2_rxd",  "msiof2_txd";
+		function = "msiof2";
+	};
+
 	pwm0_pins: pwm0 {
 		groups = "pwm0_c";
 		function = "pwm0";
@@ -371,3 +377,10 @@ 
 		};
 	};
 };
+
+&msiof2 {
+	pinctrl-0 = <&msiof2_pins>;
+	pinctrl-names = "default";
+	/* In case of using this node, please enable this property */
+	/* status = "okay"; */
+};