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Tue, 18 Sep 2018 12:56:36 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 18 Sep 2018 12:56:35 +0200 From: Ludovic Barre To: Ulf Hansson , Rob Herring Subject: [PATCH V2 23/27] mmc: mmci: add variant property to request a reset Date: Tue, 18 Sep 2018 12:55:40 +0200 Message-ID: <1537268144-21152-24-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537268144-21152-1-git-send-email-ludovic.Barre@st.com> References: <1537268144-21152-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-09-18_04:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180918_035649_325421_2EE5DC6F X-CRM114-Status: GOOD ( 14.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Coquelin , Alexandre Torgue , Loic Pallardy , devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Ludovic Barre , benjamin.gaignard@linaro.org, Gerald Baeza , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ludovic Barre Some variants could require a reset. STM32 sdmmc variant needs to reset hardware block during the power cycle procedure (for re-initialization) Signed-off-by: Ludovic Barre --- Documentation/devicetree/bindings/mmc/mmci.txt | 2 ++ drivers/mmc/host/mmci.c | 9 +++++++++ drivers/mmc/host/mmci.h | 4 ++++ 3 files changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt index 03796cf..e952707 100644 --- a/Documentation/devicetree/bindings/mmc/mmci.txt +++ b/Documentation/devicetree/bindings/mmc/mmci.txt @@ -11,6 +11,8 @@ Required properties: - compatible : contains "arm,pl18x", "arm,primecell". - vmmc-supply : phandle to the regulator device tree node, mentioned as the VCC/VDD supply in the eMMC/SD specs. +depend of variant: +- resets : phandle to internal reset line. Optional properties: - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index b1d5bc5..6b3c33f 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -1854,6 +1855,14 @@ static int mmci_probe(struct amba_device *dev, dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); + if (variant->reset) { + host->rst = devm_reset_control_get_exclusive(&dev->dev, NULL); + if (IS_ERR(host->rst)) { + ret = PTR_ERR(host->rst); + goto clk_disable; + } + } + /* Get regulators and the supported OCR mask */ ret = mmc_regulator_get_supply(mmc); if (ret) diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 7fd89b7..2d46a08 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -247,6 +247,7 @@ struct mmci_host; * @start_err: bitmask identifying the STARTBITERR bit inside MMCISTATUS * register. * @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register + * @reset: true if variant has need reset signal. */ struct variant_data { unsigned int clkreg; @@ -285,6 +286,7 @@ struct variant_data { bool qcom_dml; bool reversed_irq_handling; bool mmcimask1; + bool reset; unsigned int irq_pio_mask; u32 start_err; u32 opendrain; @@ -318,6 +320,8 @@ struct mmci_host { struct clk *clk; bool singleirq; + struct reset_control *rst; + spinlock_t lock; unsigned int mclk;