From patchwork Tue Oct 9 08:37:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 10632153 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 54A1115E8 for ; Tue, 9 Oct 2018 08:46:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 42A9E28B79 for ; Tue, 9 Oct 2018 08:46:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 35F7D28A45; Tue, 9 Oct 2018 08:46:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 579CF28A45 for ; Tue, 9 Oct 2018 08:46:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wS38v9VzJqpAsXNXFLXTu6/S0vZybrdCUefroM40eG0=; b=Z59zooRTwpEax/ vsBTgh7m7jQe9lmBYfBSuaYMYMZVqXIYfJ/WtvWK/pYI5KSsvcpdtx5FNWgYwPngAOMhPTMATCt/b QnArlAZ5vPPjpzzdjd8KYvTySqMwpbO8yJBs4/ie6PzOiMCC5r+wJh28vnpzLrsMdD2LdhAzWzcKv GLwa5dIF1eLpXAiQpOSRMO1povj/sueh6CHZJhLfZiqRk+nmWs8MIeoqY9hrCXqj1S0lFljjQdSFW LAKjhsnO+9X/KEWJ88fIGsz2bZl4CHvWOww6BzFk+DVu9C+OwzpJjt2mkEx3dRuSJq/3pr1cbTObc kivvRFvrTjxWTjbAOiRw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g9neX-0003wG-Li; Tue, 09 Oct 2018 08:46:05 +0000 Received: from mail-ve1eur02on0606.outbound.protection.outlook.com ([2a01:111:f400:fe06::606] helo=EUR02-VE1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1g9nWj-0007Sf-EC for linux-arm-kernel@lists.infradead.org; Tue, 09 Oct 2018 08:38:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sJsxzwWmsU3u6U3+iUBL8XegvbIV2DJhdrOtba0mlCw=; b=MEtqaHWiE845AbINaFdxAslmDB6Lvx4/tvzceFmecBXDcbmRGGpSN/LLq0QkE0i2nhXrjKfzP1bP/0yCJhkNZFAzTkBKcRPQbCk+cSHNoUX6ki+nxfpq5Rosls7PPFo1Qnh3jg6yjuIlO1R6o2faTWrWMIjg/EcZvRqid6v1Hh0= Received: from VI1PR04MB1613.eurprd04.prod.outlook.com (10.164.84.147) by VI1PR04MB5343.eurprd04.prod.outlook.com (52.134.123.158) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1207.26; Tue, 9 Oct 2018 08:37:30 +0000 Received: from VI1PR04MB1613.eurprd04.prod.outlook.com ([fe80::f014:635a:bee7:76b3]) by VI1PR04MB1613.eurprd04.prod.outlook.com ([fe80::f014:635a:bee7:76b3%3]) with mapi id 15.20.1207.024; Tue, 9 Oct 2018 08:37:30 +0000 From: Abel Vesa To: Sascha Hauer , Lucas Stach , "A.s. Dong" Subject: [PATCH v10 4/5] clk: imx: add imx composite clock Thread-Topic: [PATCH v10 4/5] clk: imx: add imx composite clock Thread-Index: AQHUX6tQJ9541kIf10SWRaGOsstznA== Date: Tue, 9 Oct 2018 08:37:30 +0000 Message-ID: <1539074230-27277-5-git-send-email-abel.vesa@nxp.com> References: <1539074230-27277-1-git-send-email-abel.vesa@nxp.com> In-Reply-To: <1539074230-27277-1-git-send-email-abel.vesa@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR02CA0058.eurprd02.prod.outlook.com (2603:10a6:802:14::29) To VI1PR04MB1613.eurprd04.prod.outlook.com (2a01:111:e400:596b::19) x-originating-ip: [95.76.156.53] x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; VI1PR04MB5343; 6:J5MGx9KTThcebspO3m7EaHEcj7sI7BnQAV2F/ZYpaMiEILHpYrn3v+Y0hIfiecKobye+rxV+XAX8pIc15DS8yA8Z1k9JWbHz8hezFjJ67bNf8o31OEIZD79bhaayrIeQckSwOH57YNduvwWVBUdfmkY7Dq3pz0rHKnh5qdbGZbh0rrJPGxlFnr5UEoBiyu8aaFBu2VsCtpeS78U49dgB/zfdOxNpJmQwNfpDc2BlGN8/wgeZ/TVAnelOm+OLcAW3hGARKhXVp8fo2YK6IfEoxeilsFd2vkrDbugwcmFBL8blhmexleOptANbEhS895BjoRFh/eJmmd7p2RcgBBEhg9rR0TOyiRCIiIEy7EBR1XN293taT5PXYNoOkPHYDsmPmze20D+X12V7sWzAYZzZcH5SQYzAibbL5XhCnRwh+HpDB3sYk2mX+ozrvRdGqfyf8cZZ1mFWjiaoaZPTs4hJIw==; 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x-microsoft-antispam-message-info: duGSNflW+2nr9bhVQ2NrO2s+yf06xBYEdMiuSi16cGuZXW6Li6ZelhMQzJIsRTHdkeTg2tYUB6hRsqc4Z0A9y95B1T+MZ1aF0LP7wy5wmE9o3ZP+NVRQYifVhSXehbcvdZgQmVrOSi2gEyZgdPq8HzrC1e4UYOYkvrsuCvznjIsb1UmDwFiNoWvVLewFpI9HzmNFkC6v6Vz7mdj/3PW9+OGOotnx6T3ExwNgs5Br1x+bc7GSqEsuevnI/68c0gOed5NIab/bh7fBo61qNKD6lIPMomWe9X1tys/Y2YxRRr234eOkcgIcIRlTnho3t6wmZu6uAATsUCTRR3gkVD32HUFH2qsiMpIHeOO3CLRWhzg= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9a88cbc0-220d-43f4-b3b9-08d62dc27349 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Oct 2018 08:37:30.4681 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5343 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181009_013801_522544_3FE2E759 X-CRM114-Status: GOOD ( 19.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Abel Vesa , "devicetree@vger.kernel.org" , Stephen Boyd , Michael Turquette , "linux-kernel@vger.kernel.org" , Abel Vesa , dl-linux-imx , Fabio Estevam , Shawn Guo , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since a lot of clocks on imx8m are formed by a mux, gate, predivider and divider, the idea here is to combine all of those into one composite clock, but we need to deal with both predivider and divider at the same time and therefore we add the imx_clk_composite_8m_divider_ops and register the composite clock with those. Signed-off-by: Abel Vesa Suggested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-composite-8m.c | 181 +++++++++++++++++++++++++++++++++++++ drivers/clk/imx/clk.h | 16 ++++ 3 files changed, 198 insertions(+) create mode 100644 drivers/clk/imx/clk-composite-8m.c diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index b87513c..237444b 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -3,6 +3,7 @@ obj-y += \ clk.o \ clk-busy.o \ + clk-composite-8m.o \ clk-cpu.o \ clk-fixup-div.o \ clk-fixup-mux.o \ diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c new file mode 100644 index 0000000..a28f6ac --- /dev/null +++ b/drivers/clk/imx/clk-composite-8m.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2018 NXP + */ + +#include +#include +#include +#include + +#include "clk.h" + +#define PCG_PREDIV_SHIFT 16 +#define PCG_PREDIV_WIDTH 3 +#define PCG_PREDIV_MAX 8 + +#define PCG_DIV_SHIFT 0 +#define PCG_DIV_WIDTH 6 +#define PCG_DIV_MAX 64 + +#define PCG_PCS_SHIFT 24 +#define PCG_PCS_MASK 0x7 + +#define PCG_CGC_SHIFT 28 + +static unsigned long imx_clk_composite_8m_divider_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_divider *divider = to_clk_divider(hw); + unsigned long prediv_rate; + unsigned int prediv_value; + unsigned int div_value; + + prediv_value = clk_readl(divider->reg) >> divider->shift; + prediv_value &= clk_div_mask(divider->width); + + prediv_rate = divider_recalc_rate(hw, parent_rate, prediv_value, + NULL, divider->flags, + divider->width); + + div_value = clk_readl(divider->reg) >> PCG_DIV_SHIFT; + div_value &= clk_div_mask(PCG_DIV_WIDTH); + + return divider_recalc_rate(hw, prediv_rate, div_value, NULL, + divider->flags, PCG_DIV_WIDTH); +} + +static int imx_clk_composite_8m_compute_dividers(unsigned long rate, + unsigned long parent_rate, + int *prediv, int *postdiv) +{ + int div1, div2; + int error = INT_MAX; + int ret = -EINVAL; + + /* default values */ + *prediv = 1; + *postdiv = 1; + + for (div1 = 1; div1 <= PCG_PREDIV_MAX; div1++) { + for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) { + int new_error = ((parent_rate / div1) / div2) - rate; + + if (abs(new_error) < abs(error)) { + *prediv = div1; + *postdiv = div2; + error = new_error; + ret = 0; + } + } + } + return ret; +} + +static long imx_clk_composite_8m_divider_round_rate(struct clk_hw *hw, + unsigned long rate, + unsigned long *prate) +{ + int prediv_value; + int div_value; + + imx_clk_composite_8m_compute_dividers(rate, *prate, + &prediv_value, &div_value); + + rate = DIV_ROUND_UP(*prate, prediv_value); + rate = DIV_ROUND_UP(rate, div_value); + + return rate; +} + +static int imx_clk_composite_8m_divider_set_rate(struct clk_hw *hw, + unsigned long rate, + unsigned long parent_rate) +{ + struct clk_divider *divider = to_clk_divider(hw); + unsigned long flags = 0; + int prediv_value; + int div_value; + int ret = 0; + u32 val; + + ret = imx_clk_composite_8m_compute_dividers(rate, parent_rate, + &prediv_value, &div_value); + if (ret) + return -EINVAL; + + spin_lock_irqsave(divider->lock, flags); + + val = clk_readl(divider->reg); + val &= ~((clk_div_mask(divider->width) << divider->shift) | + (clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT)); + + val |= (u32)(prediv_value - 1) << divider->shift; + val |= (u32)(div_value - 1) << PCG_DIV_SHIFT; + clk_writel(val, divider->reg); + + spin_unlock_irqrestore(divider->lock, flags); + + return ret; +} + +static const struct clk_ops imx_clk_composite_8m_divider_ops = { + .recalc_rate = imx_clk_composite_8m_divider_recalc_rate, + .round_rate = imx_clk_composite_8m_divider_round_rate, + .set_rate = imx_clk_composite_8m_divider_set_rate, +}; + +struct clk *imx_clk_composite_8m_flags(const char *name, + const char **parent_names, + int num_parents, void __iomem *reg, + unsigned long flags) +{ + struct clk_hw *mux_hw = NULL, *div_hw = NULL, *gate_hw = NULL; + struct clk_divider *div = NULL; + struct clk_gate *gate = NULL; + struct clk_mux *mux = NULL; + struct clk *clk = ERR_PTR(-ENOMEM); + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) + goto fail; + + mux_hw = &mux->hw; + mux->reg = reg; + mux->shift = PCG_PCS_SHIFT; + mux->mask = PCG_PCS_MASK; + + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) + goto fail; + + div_hw = &div->hw; + div->reg = reg; + div->shift = PCG_PREDIV_SHIFT; + div->width = PCG_PREDIV_WIDTH; + div->lock = &imx_ccm_lock; + div->flags = CLK_DIVIDER_ROUND_CLOSEST; + + gate = kzalloc(sizeof(*gate), GFP_KERNEL); + if (!gate) + goto fail; + + gate_hw = &gate->hw; + gate->reg = reg; + gate->bit_idx = PCG_CGC_SHIFT; + + clk = clk_register_composite(NULL, name, parent_names, num_parents, + mux_hw, &clk_mux_ops, div_hw, + &imx_clk_composite_8m_divider_ops, + gate_hw, &clk_gate_ops, flags); + if (IS_ERR(clk)) + goto fail; + + return clk; + +fail: + kfree(gate); + kfree(div); + kfree(mux); + return clk; +} diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 12b3fd6..37c8c4a 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -232,4 +232,20 @@ struct clk *imx_clk_cpu(const char *name, const char *parent_name, struct clk *div, struct clk *mux, struct clk *pll, struct clk *step); +struct clk *imx_clk_composite_8m_flags(const char *name, + const char **parent_names, + int num_parents, void __iomem *reg, + unsigned long flags); + +#define __imx_clk_composite_8m(name, parent_names, reg, flags) \ + imx_clk_composite_8m_flags(name, parent_names, \ + ARRAY_SIZE(parent_names), reg, \ + flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE) + +#define imx_clk_composite_8m(name, parent_names, reg) \ + __imx_clk_composite_8m(name, parent_names, reg, 0) + +#define imx_clk_composite_8m_critical(name, parent_names, reg) \ + __imx_clk_composite_8m(name, parent_names, reg, CLK_IS_CRITICAL) + #endif