diff mbox series

[09/10] soc: mediatek: change the argument of write and write_mask API

Message ID 1548747128-60136-10-git-send-email-bibby.hsieh@mediatek.com
State New, archived
Headers show
Series support gce on mt8183 platform | expand

Commit Message

Bibby Hsieh Jan. 29, 2019, 7:32 a.m. UTC
In order to enhance the convienience of client usage,
we change the input argument from subsys and offset to
struct cmdq_base and dma_addr_t.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
---
 drivers/soc/mediatek/mtk-cmdq-helper.c | 24 +++++++++++++++++-------
 include/linux/soc/mediatek/mtk-cmdq.h  | 16 ++++++++--------
 2 files changed, 25 insertions(+), 15 deletions(-)

Comments

CK Hu Jan. 29, 2019, 11:13 a.m. UTC | #1
Hi, Bibby:

On Tue, 2019-01-29 at 15:32 +0800, Bibby Hsieh wrote:
> In order to enhance the convienience of client usage,
> we change the input argument from subsys and offset to
> struct cmdq_base and dma_addr_t.
> 
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
>  drivers/soc/mediatek/mtk-cmdq-helper.c | 24 +++++++++++++++++-------
>  include/linux/soc/mediatek/mtk-cmdq.h  | 16 ++++++++--------
>  2 files changed, 25 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 923a815..34ae712 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -238,8 +238,13 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, s16 arg_c, s16 arg_b,
>  	return 0;
>  }
>  
> -int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
> +int cmdq_pkt_write(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
> +		   dma_addr_t addr, u32 value)
>  {
> +	const u32 base = (addr >> 32) ? 0 : addr & 0xFFFF0000;
> +	u8 subsys = cmdq_subsys_base_to_id(clt_base, base);

I don't understand why this would let client more convenient?  Every
time client call cmdq_pkt_write(), cmdq_subsys_base_to_id() would search
again. Why do we need such frequently search?

Regards,
CK

> +	s16 offset = addr & 0x0000FFFF;
> +
>  	return cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(value),
>  				       CMDQ_GET_ARG_B(value), offset, subsys,
>  				       CMDQ_IMMEDIATE_VALUE,
> @@ -248,21 +253,26 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
>  }
>  EXPORT_SYMBOL(cmdq_pkt_write);
>  
> -int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset,
> -			u32 value, u32 mask)
> +int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
> +			dma_addr_t addr, u32 value, u32 mask)
>  {
> -	u32 offset_mask = offset;
> +	const u32 base = (addr >> 32) ? 0 : addr & 0xFFFF0000;
> +	u8 subsys = cmdq_subsys_base_to_id(clt_base, base);
> +	s16 offset = addr & 0x0000FFFF;
>  	int err = 0;
>  
>  	if (mask != 0xffffffff) {
>  		err = cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(~mask),
>  					      CMDQ_GET_ARG_B(~mask), 0, 0, 0, 0,
>  					      0, CMDQ_CODE_MASK);
> -		offset_mask |= CMDQ_WRITE_ENABLE_MASK;
> +		offset |= CMDQ_WRITE_ENABLE_MASK;
>  	}
> -	err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
>  
> -	return err;
> +	return cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(value),
> +				       CMDQ_GET_ARG_B(value), offset, subsys,
> +				       CMDQ_IMMEDIATE_VALUE,
> +				       CMDQ_IMMEDIATE_VALUE,
> +				       CMDQ_IMMEDIATE_VALUE, CMDQ_CODE_WRITE);
>  }
>  EXPORT_SYMBOL(cmdq_pkt_write_mask);
>  
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index e4d1876..230bc2b 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -70,26 +70,26 @@ struct cmdq_client *cmdq_mbox_create(struct device *dev, int index,
>  /**
>   * cmdq_pkt_write() - append write command to the CMDQ packet
>   * @pkt:	the CMDQ packet
> - * @subsys:	the CMDQ sub system code
> - * @offset:	register offset from CMDQ sub system
> + * @cmdq_base:	the CMDQ sub system code and base address
> + * @addr:	register address
>   * @value:	the specified target register value
>   *
>   * Return: 0 for success; else the error code is returned
>   */
> -int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
> -
> +int cmdq_pkt_write(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
> +		   dma_addr_t addr, u32 value);
>  /**
>   * cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet
>   * @pkt:	the CMDQ packet
> - * @subsys:	the CMDQ sub system code
> - * @offset:	register offset from CMDQ sub system
> + * @cmdq_base:	the CMDQ sub system code and base address
> + * @addr:	register address
>   * @value:	the specified target register value
>   * @mask:	the specified target register mask
>   *
>   * Return: 0 for success; else the error code is returned
>   */
> -int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset,
> -			u32 value, u32 mask);
> +int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
> +			dma_addr_t addr, u32 value, u32 mask);
>  
>  /**
>   * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
diff mbox series

Patch

diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 923a815..34ae712 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -238,8 +238,13 @@  static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, s16 arg_c, s16 arg_b,
 	return 0;
 }
 
-int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
+int cmdq_pkt_write(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
+		   dma_addr_t addr, u32 value)
 {
+	const u32 base = (addr >> 32) ? 0 : addr & 0xFFFF0000;
+	u8 subsys = cmdq_subsys_base_to_id(clt_base, base);
+	s16 offset = addr & 0x0000FFFF;
+
 	return cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(value),
 				       CMDQ_GET_ARG_B(value), offset, subsys,
 				       CMDQ_IMMEDIATE_VALUE,
@@ -248,21 +253,26 @@  int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
 }
 EXPORT_SYMBOL(cmdq_pkt_write);
 
-int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset,
-			u32 value, u32 mask)
+int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
+			dma_addr_t addr, u32 value, u32 mask)
 {
-	u32 offset_mask = offset;
+	const u32 base = (addr >> 32) ? 0 : addr & 0xFFFF0000;
+	u8 subsys = cmdq_subsys_base_to_id(clt_base, base);
+	s16 offset = addr & 0x0000FFFF;
 	int err = 0;
 
 	if (mask != 0xffffffff) {
 		err = cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(~mask),
 					      CMDQ_GET_ARG_B(~mask), 0, 0, 0, 0,
 					      0, CMDQ_CODE_MASK);
-		offset_mask |= CMDQ_WRITE_ENABLE_MASK;
+		offset |= CMDQ_WRITE_ENABLE_MASK;
 	}
-	err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
 
-	return err;
+	return cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(value),
+				       CMDQ_GET_ARG_B(value), offset, subsys,
+				       CMDQ_IMMEDIATE_VALUE,
+				       CMDQ_IMMEDIATE_VALUE,
+				       CMDQ_IMMEDIATE_VALUE, CMDQ_CODE_WRITE);
 }
 EXPORT_SYMBOL(cmdq_pkt_write_mask);
 
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index e4d1876..230bc2b 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -70,26 +70,26 @@  struct cmdq_client *cmdq_mbox_create(struct device *dev, int index,
 /**
  * cmdq_pkt_write() - append write command to the CMDQ packet
  * @pkt:	the CMDQ packet
- * @subsys:	the CMDQ sub system code
- * @offset:	register offset from CMDQ sub system
+ * @cmdq_base:	the CMDQ sub system code and base address
+ * @addr:	register address
  * @value:	the specified target register value
  *
  * Return: 0 for success; else the error code is returned
  */
-int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
-
+int cmdq_pkt_write(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
+		   dma_addr_t addr, u32 value);
 /**
  * cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet
  * @pkt:	the CMDQ packet
- * @subsys:	the CMDQ sub system code
- * @offset:	register offset from CMDQ sub system
+ * @cmdq_base:	the CMDQ sub system code and base address
+ * @addr:	register address
  * @value:	the specified target register value
  * @mask:	the specified target register mask
  *
  * Return: 0 for success; else the error code is returned
  */
-int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset,
-			u32 value, u32 mask);
+int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, struct cmdq_base *clt_base,
+			dma_addr_t addr, u32 value, u32 mask);
 
 /**
  * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet