Message ID | 1550252913-24532-4-git-send-email-abel.vesa@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Fri, 15 Feb 2019 17:48:46 +0000 From: Abel Vesa <abel.vesa@nxp.com> To: Mike Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <kernel@pengutronix.de>, Lucas Stach <l.stach@pengutronix.de>, Angus Ainslie <angus.ainslie@puri.sm>, Rob Herring <robh@kernel.org> Subject: [PATCH v2 3/3] clk: imx8mq: Add the missing ARM clock Thread-Topic: [PATCH v2 3/3] clk: imx8mq: Add the missing ARM clock Thread-Index: AQHUxVaygt4K7Vtjfk6EnO4JuLEpZw== Date: Fri, 15 Feb 2019 17:48:46 +0000 Message-ID: <1550252913-24532-4-git-send-email-abel.vesa@nxp.com> References: <1550252913-24532-1-git-send-email-abel.vesa@nxp.com> In-Reply-To: <1550252913-24532-1-git-send-email-abel.vesa@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR0502CA0009.eurprd05.prod.outlook.com (2603:10a6:209:1::22) To AM0PR04MB5779.eurprd04.prod.outlook.com (2603:10a6:208:131::23) x-originating-ip: [95.76.156.53] authentication-results: spf=none (sender IP is ) smtp.mailfrom=abel.vesa@nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP |
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Necessary i.MX8MQ clock updates in order to support cpufreq
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Quoting Abel Vesa (2019-02-15 09:48:46) > Add the ARM clock as imx_clk_cpu type. > Will be used by cpufreq. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- Applied to clk-next
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index 57499ed..8a283cb 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -558,6 +558,12 @@ static int imx8mq_clocks_probe(struct platform_device *pdev) clks[IMX8MQ_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc_25m", 1, 8); clks[IMX8MQ_CLK_DRAM_ALT_ROOT] = imx_clk_fixed_factor("dram_alt_root", "dram_alt", 1, 4); + clks[IMX8MQ_CLK_ARM] = imx_clk_cpu("arm", "arm_a53_div", + clks[IMX8MQ_CLK_A53_DIV], + clks[IMX8MQ_CLK_A53_SRC], + clks[IMX8MQ_ARM_PLL_OUT], + clks[IMX8MQ_SYS1_PLL_800M]); + for (i = 0; i < IMX8MQ_CLK_END; i++) if (IS_ERR(clks[i])) pr_err("i.MX8mq clk %u register failed with %ld\n",