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Thu, 21 Feb 2019 18:25:00 +0000 From: Aisheng Dong To: "linux-arm-kernel@lists.infradead.org" Subject: [PATCH 03/14] arm64: dts: imx8: add conn scu clocks Thread-Topic: [PATCH 03/14] arm64: dts: imx8: add conn scu clocks Thread-Index: AQHUyhLB5z/Vto5y+UCugWB9Z0rq3w== Date: Thu, 21 Feb 2019 18:25:00 +0000 Message-ID: <1550773093-13349-4-git-send-email-aisheng.dong@nxp.com> References: <1550773093-13349-1-git-send-email-aisheng.dong@nxp.com> In-Reply-To: <1550773093-13349-1-git-send-email-aisheng.dong@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK2PR03CA0051.apcprd03.prod.outlook.com (2603:1096:202:17::21) To VI1PR04MB4222.eurprd04.prod.outlook.com (2603:10a6:803:3e::21) authentication-results: spf=none (sender IP is ) smtp.mailfrom=aisheng.dong@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f5fe5824-6981-4879-c8ce-08d69829e3d9 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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#address-cells = <1>; #size-cells = <1>; ranges = <0x5b000000 0x0 0x5b000000 0x1000000>; + /* SCU clocks */ + conn_axi_clk: clock-conn-axi { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <333333333>; + clock-output-names = "conn_axi_clk"; + }; + + conn_ahb_clk: clock-conn-ahb { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <166666666>; + clock-output-names = "conn_ahb_clk"; + }; + + conn_ipg_clk: clock-conn-ipg { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <83333333>; + clock-output-names = "conn_ipg_clk"; + }; + + enet0_clk: clock-enet0 { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "enet0_clk"; + }; + + enet0_bypass_clk: clock-enet0-bypass { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "enet0_bypass_clk"; + }; + + enet0_rgmii_clk: clock-enet0-rgmii { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "enet0_rgmii_clk"; + }; + + enet1_clk: clock-enet1 { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "enet1_clk"; + }; + + enet1_bypass_clk: clock-enet1-bypass { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "enet1_bypass_clk"; + }; + + enet1_rgmii_clk: clock-enet1-rgmii { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "enet1_rgmii_clk"; + }; + + gpmi_bch_clk: clock-gpmi-bch { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "gpmi_bch_clk"; + }; + + gpmi_bch_io_clk: clock-gpmi-bch-io { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "gpmi_bch_io_clk"; + }; + + sdhc0_clk: clock-sdhc0 { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "sdhc0_clk"; + }; + + sdhc1_clk: clock-sdhc1 { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "sdhc1_clk"; + }; + + sdhc2_clk: clock-sdhc2 { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "sdhc2_clk"; + }; + + usb3_aclk: clock-usb3-aclk { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "usb3_aclk"; + }; + + usb3_bus_aclk: clock-usb3-bus { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "usb3_bus_aclk"; + }; + + usb3_lpm_aclk: clock-usb3-lpm { + #clock-cells = <0>; + rsrc-id = ; + clk-type = ; + clock-output-names = "usb3_lpm_aclk"; + }; + conn_lpcg: clock-controller@5b200000 { reg = <0x5b200000 0xb0000>; #clock-cells = <1>;