| Message ID | 1551774568-11732-5-git-send-email-christophe.roullier@st.com (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Commit | 81311c03ab4dca83e4f4c678129b4327f2d41b40 |
| Headers | show |
| Series | stmmac: add some fixes for stm32 | expand |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c index 2b800ce..3031f2b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -408,6 +408,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) /* Default to phy auto-detection */ plat->phy_addr = -1; + /* Get clk_csr from device tree */ + of_property_read_u32(np, "clk_csr", &plat->clk_csr); + /* "snps,phy-addr" is not a standard property. Mark it as deprecated * and warn of its use. Remove this when phy node support is added. */
In Documentation stmmac.txt there is possibility to fixed CSR Clock range selection with property clk_csr. This patch add the management of this property For example to use it, add in your ethernet node DT: clk_csr = <3>; Signed-off-by: Christophe Roullier <christophe.roullier@st.com> --- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +++ 1 file changed, 3 insertions(+)