Message ID | 1553269010-15591-5-git-send-email-abel.vesa@nxp.com (mailing list archive) |
---|---|
State | RFC, archived |
Headers | show
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Fri, 22 Mar 2019 15:37:04 +0000 From: Abel Vesa <abel.vesa@nxp.com> To: Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Fabio Estevam <fabio.estevam@nxp.com>, Aisheng Dong <aisheng.dong@nxp.com>, Lucas Stach <l.stach@pengutronix.de>, Sascha Hauer <kernel@pengutronix.de> Subject: [RFC 04/19] clk: imx6q: Do not reparent uninitialized IMX6QDL_CLK_PERIPH2 clock Thread-Topic: [RFC 04/19] clk: imx6q: Do not reparent uninitialized IMX6QDL_CLK_PERIPH2 clock Thread-Index: AQHU4MUZE6Xa9A23l0WrI1B1HzslYQ== Date: Fri, 22 Mar 2019 15:37:03 +0000 Message-ID: <1553269010-15591-5-git-send-email-abel.vesa@nxp.com> References: <1553269010-15591-1-git-send-email-abel.vesa@nxp.com> In-Reply-To: <1553269010-15591-1-git-send-email-abel.vesa@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR08CA0170.eurprd08.prod.outlook.com (2603:10a6:800:d1::24) To AM0PR04MB5779.eurprd04.prod.outlook.com (2603:10a6:208:131::23) x-originating-ip: [212.146.100.6] authentication-results: spf=none (sender IP is ) smtp.mailfrom=abel.vesa@nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP |
Series |
clk: imx: Switch the imx6 and imx7 to clk_hw based API
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expand
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diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index 708e7c5..c7b671e 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base) clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL], clk[IMX6QDL_CLK_PLL3_USB_OTG]); - /* - * Handshake with mmdc_ch1 module must be masked when changing - * periph2_clk_sel. - */ - clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]); - /* Disable pll3_sw_clk by selecting the bypass clock source */ reg = readl_relaxed(ccm_base + CCM_CCSR); reg |= CCSR_PLL3_SW_CLK_SEL; @@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base) reg = readl_relaxed(ccm_base + CCM_CCSR); reg &= ~CCSR_PLL3_SW_CLK_SEL; writel_relaxed(reg, ccm_base + CCM_CCSR); - - clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]); } /*
The clock is registered later than these two re-parentings. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> --- drivers/clk/imx/clk-imx6q.c | 8 -------- 1 file changed, 8 deletions(-)