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Tue, 9 Apr 2019 05:00:01 +0000 From: Anson Huang To: "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "a.zummo@towertech.it" , "alexandre.belloni@bootlin.com" , Aisheng Dong , "ulf.hansson@linaro.org" , "sboyd@kernel.org" , Peng Fan , Daniel Baluta , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-rtc@vger.kernel.org" Subject: [PATCH V7 3/4] arm64: dts: freescale: imx8qxp: enable scu general irq channel Thread-Topic: [PATCH V7 3/4] arm64: dts: freescale: imx8qxp: enable scu general irq channel Thread-Index: AQHU7pEWxjYt5oDndkaeO3+BI9KoRw== Date: Tue, 9 Apr 2019 05:00:01 +0000 Message-ID: <1554785675-8090-3-git-send-email-Anson.Huang@nxp.com> References: <1554785675-8090-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1554785675-8090-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0PR01CA0032.apcprd01.prod.exchangelabs.com (2603:1096:203:3e::20) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0402MB3865; H:DB3PR0402MB3916.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: T1U4qXo9gnm7f8PUxltxKFeQFPWzmqZiawSdB9HJyhBtsoPKM+dqrU1r7Mlgsi6AeLmbXEuI1v1qr9b0A/6FC35wzkChDCc+gBuqt/Fr7N9THCYHRD9hfgFwOAXerPyy/OUAYcE1iSsiQMmBVEyf0FnBF5h936FZpjDndERqJ/Wq+4KAFCTmDZXWFT5KULkDxGKcPBHNddwBkg2GsSgjKz6t9hJfzVShRkHfVM+Ks9dn5nowCkauIJz8KGuL3onHY1Zixc6xBPvMxpkSUGu35d6o3/RqA1mTBQzFmD/5TtPC9izhpSWlL2D3KpDY4PKZuXxrMPGU5oTrFkIPLnTfjxThrS5VYT7VRFPG0HnLaynGhZzGIG4wJjqhx452cK3XTcPViRB7oc1MM9n6fNCdSxfGxm7yyiMWUULL7mM4YY4= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: fdb05e83-f8ec-4c60-6605-08d6bca838a9 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Apr 2019 05:00:01.5430 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3865 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190408_220009_242921_798BA7B1 X-CRM114-Status: GOOD ( 12.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox RX doorbell mode is used for this function, this patch adds support for it. Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng --- No changes. --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 0cb9398..70ef3db 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -21,6 +21,7 @@ mmc1 = &usdhc2; mmc2 = &usdhc3; serial0 = &adma_lpuart0; + mu1 = &lsio_mu1; }; cpus { @@ -117,7 +118,8 @@ scu { compatible = "fsl,imx-scu"; mbox-names = "tx0", "tx1", "tx2", "tx3", - "rx0", "rx1", "rx2", "rx3"; + "rx0", "rx1", "rx2", "rx3", + "gip3"; mboxes = <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 @@ -125,7 +127,8 @@ &lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 - &lsio_mu1 1 3>; + &lsio_mu1 1 3 + &lsio_mu1 3 3>; clk: clock-controller { compatible = "fsl,imx8qxp-clk";