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Received: from mailgw02.mediatek.com ([216.200.240.185]) by casper.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hGKQQ-0002lZ-6E; Tue, 16 Apr 2019 09:30:48 +0000 X-UUID: f153cfac70dd456ca7213cfafd9fdb65-20190416 X-UUID: f153cfac70dd456ca7213cfafd9fdb65-20190416 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1525674835; Tue, 16 Apr 2019 01:30:27 -0800 Received: from mtkmbs03n2.mediatek.inc (172.21.101.182) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 16 Apr 2019 02:30:26 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 16 Apr 2019 17:30:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 16 Apr 2019 17:30:18 +0800 From: Stu Hsieh To: Mauro Carvalho Chehab , Rob Herring , CK Hu Subject: [PATCH v2 11/15] [media] mtk-mipicsi: set the output address in HW reg Date: Tue, 16 Apr 2019 17:30:11 +0800 Message-ID: <1555407015-18130-12-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1555407015-18130-1-git-send-email-stu.hsieh@mediatek.com> References: <1555407015-18130-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: B2F60F66B73EE2CE18219833A5C4F7802105801D11014A8D1BDCB0956293656A2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190416_103046_575289_E5834289 X-CRM114-Status: GOOD ( 16.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Stu Hsieh , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch set the output address in HW reg when buffer queue and ISR. Signed-off-by: Stu Hsieh --- .../media/platform/mtk-mipicsi/mtk_mipicsi.c | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c b/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c index 3624186206bd..4027ed9c94f3 100644 --- a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c +++ b/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c @@ -109,6 +109,7 @@ #define CAMSV_TG_SEN_GRAB_LIN 0x50C #define CAMSV_TG_PATH_CFG 0x510 +#define IMGO_BASE_ADDR 0x220 #define IMGO_XSIZE 0x230 #define IMGO_YSIZE 0x234 #define IMGO_STRIDE 0x238 @@ -516,12 +517,22 @@ static int mtk_mipicsi_vb2_prepare(struct vb2_buffer *vb) return 0; } +static void mtk_mipicsi_fill_buffer(void __iomem *base, dma_addr_t dma_handle) +{ + writel(dma_handle, base + IMGO_BASE_ADDR); +} + static void mtk_mipicsi_vb2_queue(struct vb2_buffer *vb) { struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); struct soc_camera_host *ici = to_soc_camera_host(icd->parent); struct mtk_mipicsi_dev *mipicsi = ici->priv; + unsigned int i = 0; + u64 offset = 0; + u8 link_index = 0U; char *va = NULL; + u32 bytesperline = mipicsi->bytesperline; + u32 height = mipicsi->height; spin_lock(&mipicsi->queue_lock); list_add_tail(&(mipicsi->cam_buf[vb->index].queue), @@ -530,6 +541,20 @@ static void mtk_mipicsi_vb2_queue(struct vb2_buffer *vb) va = vb2_plane_vaddr(vb, 0); + for (i = 0U; (mipicsi->enqueue_cnt == 0UL) && (i < MTK_CAMDMA_MAX_NUM); + ++i) + if (((mipicsi->link_reg_val >> i) & 0x01U) == 0x01U) { + offset = (u64)link_index * bytesperline * height; + + spin_lock(&mipicsi->lock); + mtk_mipicsi_fill_buffer(mipicsi->camsv[i], + mipicsi->cam_buf[vb->index].vb_dma_addr_phy + + offset); + spin_unlock(&mipicsi->lock); + + link_index++; + } + ++(mipicsi->enqueue_cnt); } @@ -961,6 +986,10 @@ static void mtk_mipicsi_irq_buf_process(struct mtk_mipicsi_dev *mipicsi) struct mtk_mipicsi_buf *tmp = NULL; unsigned int index = 0U; unsigned int next = 0U; + u64 offset = 0ULL; + u8 link_index = 0U; + void __iomem *base = NULL; + dma_addr_t pa; for (i = 0U; i < MTK_CAMDMA_MAX_NUM; ++i) mipicsi->irq_status[i] = false; @@ -983,6 +1012,16 @@ static void mtk_mipicsi_irq_buf_process(struct mtk_mipicsi_dev *mipicsi) ++i; } + for (i = 0U; i < MTK_CAMDMA_MAX_NUM; ++i) { + if (((mipicsi->link_reg_val >> i) & 0x01U) == 0x01U) { + offset = (u64)link_index * + mipicsi->bytesperline * mipicsi->height; + base = mipicsi->camsv[i]; + pa = mipicsi->cam_buf[next].vb_dma_addr_phy; + mtk_mipicsi_fill_buffer(base, pa + offset); + link_index++; + } + } /* * fb_list has one more buffer. Free the first buffer to user * and fill the second buffer to HW.