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[2/4] arm64: Always trace_hardirq_off when taking an IRQ

Message ID 1555424556-46023-3-git-send-email-julien.thierry@arm.com (mailing list archive)
State New, archived
Headers show
Series arm64: Fix save/restore with IRQ priority masking | expand

Commit Message

Julien Thierry April 16, 2019, 2:22 p.m. UTC 
It is not an issue to have redundant calls to trace_hardirqs_off().
Simplify the EL1 IRQ vector handler, checking the PMR value only
when doing trace_hardirqs_on().

Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/kernel/entry.S | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

--
1.9.1
diff mbox series

Patch

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 6a38903..b0467a1 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -617,18 +617,7 @@  el1_irq:
 	kernel_entry 1
 	enable_da_f
 #ifdef CONFIG_TRACE_IRQFLAGS
-#ifdef CONFIG_ARM64_PSEUDO_NMI
-alternative_if ARM64_HAS_IRQ_PRIO_MASKING
-	ldr	x20, [sp, #S_PMR_SAVE]
-alternative_else
-	mov	x20, #GIC_PRIO_IRQON
-alternative_endif
-	cmp	x20, #GIC_PRIO_IRQOFF
-	/* Irqs were disabled, don't trace */
-	b.ls	1f
-#endif
 	bl	trace_hardirqs_off
-1:
 #endif

 	irq_handler
@@ -649,6 +638,11 @@  alternative_else_nop_endif
 #endif
 #ifdef CONFIG_TRACE_IRQFLAGS
 #ifdef CONFIG_ARM64_PSEUDO_NMI
+alternative_if ARM64_HAS_IRQ_PRIO_MASKING
+	ldr	x20, [sp, #S_PMR_SAVE]
+alternative_else
+	mov	x20, #GIC_PRIO_IRQON
+alternative_endif
 	/*
 	 * if IRQs were disabled when we received the interrupt, we have an NMI
 	 * and we are not re-enabling interrupt upon eret. Skip tracing.