| Message ID | 1557324535-9050-1-git-send-email-eugen.hristev@microchip.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 8632944841d41a36d77dd1fa88d4201b5291100f |
| Headers | show |
| Series | watchdog: sama5d4: fix WDD value to be always set to max | expand |
On Wed, May 08, 2019 at 02:15:03PM +0000, Eugen.Hristev@microchip.com wrote: > From: Eugen Hristev <eugen.hristev@microchip.com> > > WDD value must be always set to max (0xFFF) otherwise the hardware > block will reset the board on the first ping of the watchdog. > Not sure why setting WDD to the same value as WDV would do that, but on the other side it looks like setting WDD to anything but the maximum doesn't add any value either, so Reviewed-by: Guenter Roeck <linux@roeck-us.net> Guenter > Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> > --- > drivers/watchdog/sama5d4_wdt.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c > index 1e93c1b..d495336 100644 > --- a/drivers/watchdog/sama5d4_wdt.c > +++ b/drivers/watchdog/sama5d4_wdt.c > @@ -111,9 +111,7 @@ static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd, > u32 value = WDT_SEC2TICKS(timeout); > > wdt->mr &= ~AT91_WDT_WDV; > - wdt->mr &= ~AT91_WDT_WDD; > wdt->mr |= AT91_WDT_SET_WDV(value); > - wdt->mr |= AT91_WDT_SET_WDD(value); > > /* > * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When > @@ -251,7 +249,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev) > > timeout = WDT_SEC2TICKS(wdd->timeout); > > - wdt->mr |= AT91_WDT_SET_WDD(timeout); > + wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT)); > wdt->mr |= AT91_WDT_SET_WDV(timeout); > > ret = sama5d4_wdt_init(wdt); > -- > 2.7.4 >
On 08.05.2019 19:34, Guenter Roeck wrote: > On Wed, May 08, 2019 at 02:15:03PM +0000, Eugen.Hristev@microchip.com wrote: >> From: Eugen Hristev <eugen.hristev@microchip.com> >> >> WDD value must be always set to max (0xFFF) otherwise the hardware >> block will reset the board on the first ping of the watchdog. >> > Not sure why setting WDD to the same value as WDV would do that, > but on the other side it looks like setting WDD to anything but > the maximum doesn't add any value either, so It's a hardware issue. Normally, setting a WDD lower would allow the system for a little time to print out something, before the inevitable reset happens... In our case, setting WDD lower than max would not allow a single watchdog feed, as the first attempt to write the CR would trigger the reset. This bug was not obvious because the driver was always setting both WDD and WDV to max... until timeout-sec property came up in DT which changes this. Eugen > > Reviewed-by: Guenter Roeck <linux@roeck-us.net> > > Guenter > >> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> >> --- >> drivers/watchdog/sama5d4_wdt.c | 4 +--- >> 1 file changed, 1 insertion(+), 3 deletions(-) >> >> diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c >> index 1e93c1b..d495336 100644 >> --- a/drivers/watchdog/sama5d4_wdt.c >> +++ b/drivers/watchdog/sama5d4_wdt.c >> @@ -111,9 +111,7 @@ static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd, >> u32 value = WDT_SEC2TICKS(timeout); >> >> wdt->mr &= ~AT91_WDT_WDV; >> - wdt->mr &= ~AT91_WDT_WDD; >> wdt->mr |= AT91_WDT_SET_WDV(value); >> - wdt->mr |= AT91_WDT_SET_WDD(value); >> >> /* >> * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When >> @@ -251,7 +249,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev) >> >> timeout = WDT_SEC2TICKS(wdd->timeout); >> >> - wdt->mr |= AT91_WDT_SET_WDD(timeout); >> + wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT)); >> wdt->mr |= AT91_WDT_SET_WDV(timeout); >> >> ret = sama5d4_wdt_init(wdt); >> -- >> 2.7.4 >> > >
diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c index 1e93c1b..d495336 100644 --- a/drivers/watchdog/sama5d4_wdt.c +++ b/drivers/watchdog/sama5d4_wdt.c @@ -111,9 +111,7 @@ static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd, u32 value = WDT_SEC2TICKS(timeout); wdt->mr &= ~AT91_WDT_WDV; - wdt->mr &= ~AT91_WDT_WDD; wdt->mr |= AT91_WDT_SET_WDV(value); - wdt->mr |= AT91_WDT_SET_WDD(value); /* * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When @@ -251,7 +249,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev) timeout = WDT_SEC2TICKS(wdd->timeout); - wdt->mr |= AT91_WDT_SET_WDD(timeout); + wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT)); wdt->mr |= AT91_WDT_SET_WDV(timeout); ret = sama5d4_wdt_init(wdt);