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Thu, 9 May 2019 13:29:19 +0000 From: Anson Huang To: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "otavio@ossystems.com.br" , Leonard Crestez , Robin Gong , "schnitzeltony@gmail.com" , "u.kleine-koenig@pengutronix.de" , "jan.tuerk@emtrion.com" , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH V12 1/5] dt-bindings: pwm: Add i.MX TPM PWM binding Thread-Topic: [PATCH V12 1/5] dt-bindings: pwm: Add i.MX TPM PWM binding Thread-Index: AQHVBms0dpnXU0ejkkq6UgSdEVVQow== Date: Thu, 9 May 2019 13:29:19 +0000 Message-ID: <1557408252-21281-2-git-send-email-Anson.Huang@nxp.com> References: <1557408252-21281-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1557408252-21281-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0P153CA0001.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::13) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; 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Signed-off-by: Anson Huang Reviewed-by: Rob Herring --- No change. --- .../devicetree/bindings/pwm/imx-tpm-pwm.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt diff --git a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt new file mode 100644 index 0000000..3ba958d --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt @@ -0,0 +1,22 @@ +Freescale i.MX TPM PWM controller + +Required properties: +- compatible : Should be "fsl,imx7ulp-pwm". +- reg: Physical base address and length of the controller's registers. +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. +- clocks : The clock provided by the SoC to drive the PWM. +- interrupts: The interrupt for the PWM controller. + +Note: The TPM counter and period counter are shared between multiple channels, so all channels +should use same period setting. + +Example: + +tpm4: pwm@40250000 { + compatible = "fsl,imx7ulp-pwm"; + reg = <0x40250000 0x1000>; + assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; + assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; + clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; + #pwm-cells = <3>; +};