@@ -58,8 +58,8 @@ struct sci_clk_provider {
struct sci_clk {
struct clk_hw hw;
u16 dev_id;
- u8 clk_id;
- u8 num_parents;
+ u32 clk_id;
+ u32 num_parents;
struct sci_clk_provider *provider;
u8 flags;
struct list_head node;
@@ -221,11 +221,11 @@ static int sci_clk_set_rate(struct clk_hw *hw, unsigned long rate,
static u8 sci_clk_get_parent(struct clk_hw *hw)
{
struct sci_clk *clk = to_sci_clk(hw);
- u8 parent_id;
+ u32 parent_id = 0;
int ret;
ret = clk->provider->ops->get_parent(clk->provider->sci, clk->dev_id,
- clk->clk_id, &parent_id);
+ clk->clk_id, (void *)&parent_id);
if (ret) {
dev_err(clk->provider->dev,
"get-parent failed for dev=%d, clk=%d, ret=%d\n",
@@ -233,7 +233,9 @@ static u8 sci_clk_get_parent(struct clk_hw *hw)
return 0;
}
- return parent_id - clk->clk_id - 1;
+ parent_id = parent_id - clk->clk_id - 1;
+
+ return (u8)parent_id;
}
/**
@@ -417,13 +419,14 @@ static int ti_sci_scan_clocks_from_fw(struct sci_clk_provider *provider)
int max_clks = 0;
int clk_id = 0;
int dev_id = 0;
- u8 num_parents;
+ u32 num_parents = 0;
int gap_size = 0;
struct device *dev = provider->dev;
while (1) {
ret = provider->ops->get_num_parents(provider->sci, dev_id,
- clk_id, &num_parents);
+ clk_id,
+ (void *)&num_parents);
if (ret) {
gap_size++;
if (!clk_id) {
@@ -546,7 +549,7 @@ static int ti_sci_scan_clocks_from_dt(struct sci_clk_provider *provider)
provider->ops->get_num_parents(provider->sci,
sci_clk->dev_id,
sci_clk->clk_id,
- &sci_clk->num_parents);
+ (void *)&sci_clk->num_parents);
list_add_tail(&sci_clk->node, &clks);
num_clks++;
@@ -555,6 +558,23 @@ static int ti_sci_scan_clocks_from_dt(struct sci_clk_provider *provider)
if (num_parents == 1)
num_parents = 0;
+ /*
+ * Linux kernel has inherent limitation
+ * of 255 clock parents at the moment.
+ * Right now, it is not expected that
+ * any mux clock from sci-clk driver
+ * would exceed that limit either, but
+ * the ABI basically provides that
+ * possibility. Print out a warning if
+ * this happens for any clock.
+ */
+ if (num_parents >= 255) {
+ dev_warn(dev, "too many parents for dev=%d, clk=%d (%d), cropping to 255.\n",
+ sci_clk->dev_id,
+ sci_clk->clk_id, num_parents);
+ num_parents = 255;
+ }
+
clk_id = args.args[1] + 1;
while (num_parents--) {
Currently, the clock identifiers are limited to 255. To support future SoCs, this muse be extended to 32 bits, which should provide way more than enough space. Basic support for extending the clock API is going to be implemented in the firmware driver, but there are some minor changes that need to be done on the clock driver side first. Signed-off-by: Tero Kristo <t-kristo@ti.com> --- drivers/clk/keystone/sci-clk.c | 36 ++++++++++++++++++++++++++++-------- 1 file changed, 28 insertions(+), 8 deletions(-)