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Thu, 19 Sep 2019 17:10:52 +0800 From: Chunfeng Yun To: Kishon Vijay Abraham I , Rob Herring Subject: [PATCH v3 10/11] phy: phy-mtk-tphy: add a new reference clock Date: Thu, 19 Sep 2019 17:10:41 +0800 Message-ID: <1568884242-22775-10-git-send-email-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1568884242-22775-1-git-send-email-chunfeng.yun@mediatek.com> References: <1568884242-22775-1-git-send-email-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 3A399D42589CA27349D8989A1CF450DDCC3A8821DEE5373DD983C0391599E36B2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190919_021104_187541_6AE30FA7 X-CRM114-Status: GOOD ( 13.85 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [216.200.240.184 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chunfeng Yun , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Usually the digital and analog phys use the same reference clock, but some platforms have two separate reference clocks for each of them, so add another optional clock to support them. In order to keep the clock names consistent with PHY IP's, change the da_ref for analog phy and ref clock for digital phy. Signed-off-by: Chunfeng Yun --- v3: no changes v2: fix typo of analog --- drivers/phy/mediatek/phy-mtk-tphy.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c index c6424fd2a06d..cdbcc49f7115 100644 --- a/drivers/phy/mediatek/phy-mtk-tphy.c +++ b/drivers/phy/mediatek/phy-mtk-tphy.c @@ -298,7 +298,8 @@ struct mtk_phy_instance { struct u2phy_banks u2_banks; struct u3phy_banks u3_banks; }; - struct clk *ref_clk; /* reference clock of anolog phy */ + struct clk *ref_clk; /* reference clock of (digital) phy */ + struct clk *da_ref_clk; /* reference clock of analog phy */ u32 index; u8 type; int eye_src; @@ -925,6 +926,13 @@ static int mtk_phy_init(struct phy *phy) return ret; } + ret = clk_prepare_enable(instance->da_ref_clk); + if (ret) { + dev_err(tphy->dev, "failed to enable da_ref\n"); + clk_disable_unprepare(instance->ref_clk); + return ret; + } + switch (instance->type) { case PHY_TYPE_USB2: u2_phy_instance_init(tphy, instance); @@ -984,6 +992,7 @@ static int mtk_phy_exit(struct phy *phy) u2_phy_instance_exit(tphy, instance); clk_disable_unprepare(instance->ref_clk); + clk_disable_unprepare(instance->da_ref_clk); return 0; } @@ -1170,6 +1179,14 @@ static int mtk_tphy_probe(struct platform_device *pdev) retval = PTR_ERR(instance->ref_clk); goto put_child; } + + instance->da_ref_clk = + devm_clk_get_optional(&phy->dev, "da_ref"); + if (IS_ERR(instance->da_ref_clk)) { + dev_err(dev, "failed to get da_ref_clk(id-%d)\n", port); + retval = PTR_ERR(instance->da_ref_clk); + goto put_child; + } } provider = devm_of_phy_provider_register(dev, mtk_phy_xlate);