diff mbox series

arm64: defconfig: Enable SMMU v3 PMCG

Message ID 1570695890-46743-1-git-send-email-wangzhou1@hisilicon.com (mailing list archive)
State Mainlined
Commit 006ece996d2206082d281ba271b1ed17f1ee6422
Headers show
Series arm64: defconfig: Enable SMMU v3 PMCG | expand

Commit Message

Zhou Wang Oct. 10, 2019, 8:24 a.m. UTC
HiSilicon Kunpeng920 SoC's SMMU has Performance Monitor Counter Groups(PMCG).
This patch enables related driver in defconfig.

Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

Comments

Wei Xu Oct. 30, 2019, 9:15 a.m. UTC | #1
On 2019/10/10 16:24, Zhou Wang wrote:
> HiSilicon Kunpeng920 SoC's SMMU has Performance Monitor Counter Groups(PMCG).
> This patch enables related driver in defconfig.
>
> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>

Thanks!
Applied to the hisilicon arm64 defconfig tree.

Best Regards,
Wei

> ---
>   arch/arm64/configs/defconfig | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 8e05c39..1f4940c 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -801,6 +801,7 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y
>   CONFIG_PHY_UNIPHIER_USB2=y
>   CONFIG_PHY_UNIPHIER_USB3=y
>   CONFIG_PHY_TEGRA_XUSB=y
> +CONFIG_ARM_SMMU_V3_PMU=m
>   CONFIG_FSL_IMX8_DDR_PMU=m
>   CONFIG_HISI_PMU=y
>   CONFIG_QCOM_L2_PMU=y
diff mbox series

Patch

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 8e05c39..1f4940c 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -801,6 +801,7 @@  CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PHY_UNIPHIER_USB2=y
 CONFIG_PHY_UNIPHIER_USB3=y
 CONFIG_PHY_TEGRA_XUSB=y
+CONFIG_ARM_SMMU_V3_PMU=m
 CONFIG_FSL_IMX8_DDR_PMU=m
 CONFIG_HISI_PMU=y
 CONFIG_QCOM_L2_PMU=y