| Message ID | 1572242984-30460-3-git-send-email-dehui.sun@mediatek.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 5bc8e2875ffbc5d1679b0966d48308f3d93637d4 |
| Headers | show |
| Series | add systimer node for MT8183 SoC | expand |
On 28/10/2019 07:09, Dehui Sun wrote: > Add systimer0 device node for MT8183. I renamed systemer0 to systimer. Applied, thanks! > > Signed-off-by: Dehui Sun <dehui.sun@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 7e23179..40145dc 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -326,6 +326,15 @@ > clock-names = "spi", "wrap"; > }; > > + systimer: timer@10017000 { > + compatible = "mediatek,mt8183-timer", > + "mediatek,mt6765-timer"; > + reg = <0 0x10017000 0 0x1000>; > + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&topckgen CLK_TOP_CLK13M>; > + clock-names = "clk13m"; > + }; > + > auxadc: auxadc@11001000 { > compatible = "mediatek,mt8183-auxadc", > "mediatek,mt8173-auxadc"; >
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 7e23179..40145dc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -326,6 +326,15 @@ clock-names = "spi", "wrap"; }; + systimer: timer@10017000 { + compatible = "mediatek,mt8183-timer", + "mediatek,mt6765-timer"; + reg = <0 0x10017000 0 0x1000>; + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&topckgen CLK_TOP_CLK13M>; + clock-names = "clk13m"; + }; + auxadc: auxadc@11001000 { compatible = "mediatek,mt8183-auxadc", "mediatek,mt8173-auxadc";
Add systimer0 device node for MT8183. Signed-off-by: Dehui Sun <dehui.sun@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)