@@ -506,7 +506,7 @@ static const struct clk_ops clk_sccg_pll_ops = {
.determine_rate = clk_sccg_pll_determine_rate,
};
-struct clk *imx_clk_sccg_pll(const char *name,
+struct clk_hw *imx_clk_hw_sccg_pll(const char *name,
const char * const *parent_names,
u8 num_parents,
u8 parent, u8 bypass1, u8 bypass2,
@@ -545,5 +545,5 @@ struct clk *imx_clk_sccg_pll(const char *name,
return ERR_PTR(ret);
}
- return hw->clk;
+ return hw;
}
@@ -116,13 +116,17 @@ struct clk_hw *imx_clk_hw_frac_pll(const char *name, const char *parent_name,
#define imx_clk_frac_pll(name, parent_name, base) \
imx_clk_hw_frac_pll(name, parent_name, base)->clk
-struct clk *imx_clk_sccg_pll(const char *name,
+struct clk_hw *imx_clk_hw_sccg_pll(const char *name,
const char * const *parent_names,
u8 num_parents,
u8 parent, u8 bypass1, u8 bypass2,
void __iomem *base,
unsigned long flags);
-
+#define imx_clk_sccg_pll(name, parent_names, num_parents, parent, \
+ bypass1, bypass2, base, flags) \
+ imx_clk_hw_sccg_pll(name, parent_names, num_parents, parent, \
+ bypass1, bypass2, base, flags)->clk
+
enum imx_pllv3_type {
IMX_PLLV3_GENERIC,
IMX_PLLV3_SYS,