| Message ID | 1573635069-30883-5-git-send-email-claudiu.beznea@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show
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envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa5.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: bGwda3c7RjfO8lIbSyRUOpyaccYkgrHw9ivBc2/sjgPCCZguqwCnocGO+kIcg23xzXzGEVx8Y4 GYDCnIJmd6d3rG6yWJCIGbo514EnGI9m+4GX+7pulTxEdPLhk092MGkiGf2zzwHsem4j3T7+5P XfYBPYE9gzsxFmqERBCtIJOheM5UK2KqZ74o+vEl0jwDK8/sNZFI2BlDYkfi9ukdarEVTl6Lsz CmjJ0EVnsWpeiQJPUttnXR2ZJkvf3Mtc9e/Hse7iHYQ/6D6qUwUEOt1TkCfcHaWN/lJpanQACk VpU= X-IronPort-AV: E=Sophos;i="5.68,299,1569308400"; d="scan'208";a="55397227" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Nov 2019 01:51:24 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 13 Nov 2019 01:51:23 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.85.251) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Wed, 13 Nov 2019 01:51:21 -0700 From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <linux@armlinux.org.uk>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <ludovic.desroches@microchip.com> Subject: [PATCH 04/13] ARM: at91/defconfig: add config option for SAM9X60 SoC Date: Wed, 13 Nov 2019 10:51:00 +0200 Message-ID: <1573635069-30883-5-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1573635069-30883-1-git-send-email-claudiu.beznea@microchip.com> References: <1573635069-30883-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191113_005127_817976_370C2666 X-CRM114-Status: UNSURE ( 7.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [216.71.150.166 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <linux-arm-kernel.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> List-Post: <mailto:linux-arm-kernel@lists.infradead.org> List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea <claudiu.beznea@microchip.com> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org |
| Series |
add defconfig support for SAM9X60
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expand
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diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig index 53aa41c9e429..5b5f86ce5c55 100644 --- a/arch/arm/configs/at91_dt_defconfig +++ b/arch/arm/configs/at91_dt_defconfig @@ -13,6 +13,7 @@ CONFIG_ARCH_MULTI_V5=y CONFIG_ARCH_AT91=y CONFIG_SOC_AT91RM9200=y CONFIG_SOC_AT91SAM9=y +CONFIG_SOC_SAM9X60=y CONFIG_AEABI=y CONFIG_UACCESS_WITH_MEMCPY=y CONFIG_ZBOOT_ROM_TEXT=0x0
Add config option for SAM9X60 SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- arch/arm/configs/at91_dt_defconfig | 1 + 1 file changed, 1 insertion(+)