| Message ID | 1574819937-6246-7-git-send-email-dennis-yc.hsieh@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,01/14] dt-binding: gce: add gce header file for mt6779 | expand |
On Wed, 2019-11-27 at 09:58 +0800, Dennis YC Hsieh wrote: > add gce device node for mt6779 > > Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com> Reviewed-by: Bibby Hsieh <bibby.hsieh@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt6779.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi > index daa25b75788f..10d59385f4a1 100644 > --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/clock/mt6779-clk.h> > #include <dt-bindings/interrupt-controller/irq.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/gce/mt6779-gce.h> > > / { > compatible = "mediatek,mt6779"; > @@ -159,6 +160,15 @@ > #clock-cells = <1>; > }; > > + gce: mailbox@10228000 { > + compatible = "mediatek,mt6779-gce"; > + reg = <0 0x10228000 0 0x4000>; > + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_LOW>; > + #mbox-cells = <3>; > + clocks = <&infracfg_ao CLK_INFRA_GCE>; > + clock-names = "gce"; > + }; > + > uart0: serial@11002000 { > compatible = "mediatek,mt6779-uart", > "mediatek,mt6577-uart";
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi index daa25b75788f..10d59385f4a1 100644 --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/clock/mt6779-clk.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/gce/mt6779-gce.h> / { compatible = "mediatek,mt6779"; @@ -159,6 +160,15 @@ #clock-cells = <1>; }; + gce: mailbox@10228000 { + compatible = "mediatek,mt6779-gce"; + reg = <0 0x10228000 0 0x4000>; + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_LOW>; + #mbox-cells = <3>; + clocks = <&infracfg_ao CLK_INFRA_GCE>; + clock-names = "gce"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt6779-uart", "mediatek,mt6577-uart";
add gce device node for mt6779 Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt6779.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)