diff mbox series

[V4,1/2] dt-bindings/irq: add binding for NXP INTMUX interrupt multiplexer

Message ID 1576845281-32675-2-git-send-email-qiangqing.zhang@nxp.com (mailing list archive)
State New, archived
Headers show
Series irqchip: add NXP INTMUX interrupt controller | expand

Commit Message

Joakim Zhang Dec. 20, 2019, 12:34 p.m. UTC
This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer
for i.MX8 family SoCs.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 .../interrupt-controller/fsl,intmux.txt       | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt

Comments

Rob Herring Jan. 8, 2020, 4:01 a.m. UTC | #1
On Fri, Dec 20, 2019 at 6:38 AM Joakim Zhang <qiangqing.zhang@nxp.com> wrote:
>
> This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer
> for i.MX8 family SoCs.

4 versions in 2 days? Don't do that. Give reviewers some time.

Convert this to DT schema please. And make sure to send to DT list if
you want it reviewed. You only sent v1 to the list.

Rob
Joakim Zhang Jan. 9, 2020, 5:14 a.m. UTC | #2
> -----Original Message-----
> From: Rob Herring <robh+dt@kernel.org>
> Sent: 2020年1月8日 12:02
> To: Joakim Zhang <qiangqing.zhang@nxp.com>
> Cc: Marc Zyngier <maz@kernel.org>; Thomas Gleixner <tglx@linutronix.de>;
> Jason Cooper <jason@lakedaemon.net>; Mark Rutland
> <mark.rutland@arm.com>; Shawn Guo <shawnguo@kernel.org>; Sascha
> Hauer <s.hauer@pengutronix.de>; Sascha Hauer <kernel@pengutronix.de>;
> dl-linux-imx <linux-imx@nxp.com>; linux-kernel@vger.kernel.org; Andy Duan
> <fugang.duan@nxp.com>; moderated list:ARM/FREESCALE IMX / MXC ARM
> ARCHITECTURE <linux-arm-kernel@lists.infradead.org>
> Subject: Re: [PATCH V4 1/2] dt-bindings/irq: add binding for NXP INTMUX
> interrupt multiplexer
> 
> On Fri, Dec 20, 2019 at 6:38 AM Joakim Zhang <qiangqing.zhang@nxp.com>
> wrote:
> >
> > This patch adds the DT bindings for the NXP INTMUX interrupt
> > multiplexer for i.MX8 family SoCs.
> 
> 4 versions in 2 days? Don't do that. Give reviewers some time.
> 
> Convert this to DT schema please. And make sure to send to DT list if you want
> it reviewed. You only sent v1 to the list.

Thanks Rob. I will convert this into DT schema.

Best Regards,
Joakim Zhang
> Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt
new file mode 100644
index 000000000000..bdba3d00a935
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt
@@ -0,0 +1,36 @@ 
+Freescale INTMUX interrupt multiplexer
+
+Required properties:
+
+- compatible: Should be:
+   - "fsl,imx-intmux"
+- reg: Physical base address and size of registers.
+- interrupts: Should contain the parent interrupt lines (up to 8) used to
+  multiplex the input interrupts.
+- clocks: Should contain one clock for entry in clock-names.
+- clock-names:
+   - "ipg": main logic clock
+- interrupt-controller: Identifies the node as an interrupt controller.
+- #interrupt-cells: Specifies the number of cells needed to encode an
+  interrupt source. The value must be 2.
+   - the 1st cell: hardware interrupt number
+   - the 2nd cell: channel index, value must smaller than channels used
+
+Optional properties:
+
+- fsl,intmux_chans: The number of channels used for interrupt source. The
+  Maximum value is 8. If this property is not set in DT then driver uses
+  1 channel by default.
+
+Example:
+
+	intmux@37400000 {
+		compatible = "fsl,imx-intmux";
+		reg = <0x37400000 0x1000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clk IMX8QM_CM40_IPG_CLK>;
+		clock-names = "ipg";
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+