[1/4] clk: at91: usb: continue if clk_hw_round_rate() return zero

Commit Message

Claudiu Beznea Jan. 17, 2020, 11:36 a.m. UTC

clk_hw_round_rate() may call round rate function of its parents. In case
of SAM9X60 two of USB parrents are PLLA and UPLL. These clocks are
controlled by clk-sam9x60-pll.c driver. The round rate function for this
driver is sam9x60_pll_round_rate() which call in turn
sam9x60_pll_get_best_div_mul(). In case the requested rate is not in the
proper range (rate < characteristics->output[0].min &&
rate > characteristics->output[0].max) the sam9x60_pll_round_rate() will
return a negative number to its caller (called by
clk_core_round_rate_nolock()). clk_hw_round_rate() will return zero in
case a negative number is returned by clk_core_round_rate_nolock(). With
this, the USB clock will continue its rate computation even caller of
clk_hw_round_rate() returned an error. With this, the USB clock on SAM9X60
may not chose the best parent. I detected this after a suspend/resume
cycle on SAM9X60.

Signed-off-by: Claudiu Beznea <[e-mail]>
---
 drivers/clk/at91/clk-usb.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Stephen Boyd Feb. 12, 2020, 11:32 p.m. UTC | #1

Quoting Claudiu Beznea (2020-01-17 03:36:46)
> clk_hw_round_rate() may call round rate function of its parents. In case
> of SAM9X60 two of USB parrents are PLLA and UPLL. These clocks are
> controlled by clk-sam9x60-pll.c driver. The round rate function for this
> driver is sam9x60_pll_round_rate() which call in turn
> sam9x60_pll_get_best_div_mul(). In case the requested rate is not in the
> proper range (rate < characteristics->output[0].min &&
> rate > characteristics->output[0].max) the sam9x60_pll_round_rate() will
> return a negative number to its caller (called by
> clk_core_round_rate_nolock()). clk_hw_round_rate() will return zero in
> case a negative number is returned by clk_core_round_rate_nolock(). With
> this, the USB clock will continue its rate computation even caller of
> clk_hw_round_rate() returned an error. With this, the USB clock on SAM9X60
> may not chose the best parent. I detected this after a suspend/resume
> cycle on SAM9X60.
> 
> Signed-off-by: Claudiu Beznea <[e-mail]>
> ---

Applied to clk-next

Patch

diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
index 22aede42a336..3c0bd7e51b09 100644
--- a/drivers/clk/at91/clk-usb.c
+++ b/drivers/clk/at91/clk-usb.c
@@ -75,6 +75,9 @@  static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
 			tmp_parent_rate = req->rate * div;
 			tmp_parent_rate = clk_hw_round_rate(parent,
 							   tmp_parent_rate);
+			if (!tmp_parent_rate)
+				continue;
+
 			tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
 			if (tmp_rate < req->rate)
 				tmp_diff = req->rate - tmp_rate;