diff mbox series

[5/6] arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register

Message ID 1580215149-21492-6-git-send-email-anshuman.khandual@arm.com
State New, archived
Headers show
Series Introduce ID_PFR2 and other CPU feature changes | expand

Commit Message

Anshuman Khandual Jan. 28, 2020, 12:39 p.m. UTC
ID_DFR0 based TraceFilt feature should not be exposed. Hence lets drop it.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/kernel/cpufeature.c | 1 -
 1 file changed, 1 deletion(-)

Comments

Suzuki K Poulose March 20, 2020, 6:19 p.m. UTC | #1
On 01/28/2020 12:39 PM, Anshuman Khandual wrote:
> ID_DFR0 based TraceFilt feature should not be exposed.

... to guests.

  Hence lets drop it.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: James Morse <james.morse@arm.com>
> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
>   arch/arm64/kernel/cpufeature.c | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 2726bd6441da..a8ded1f0eeaf 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -374,7 +374,6 @@ static const struct arm64_ftr_bits ftr_id_pfr2[] = {
>   };
>   
>   static const struct arm64_ftr_bits ftr_id_dfr0[] = {
> -	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 28, 4, 0),
>   	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 24, 4, 0xf),	/* PerfMon */
>   	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0),
>   	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 16, 4, 0),
>
Anshuman Khandual April 2, 2020, 3 a.m. UTC | #2
On 03/20/2020 11:49 PM, Suzuki K Poulose wrote:
> On 01/28/2020 12:39 PM, Anshuman Khandual wrote:
>> ID_DFR0 based TraceFilt feature should not be exposed.
> 
> ... to guests.
> 
>  Hence lets drop it.

Sure, will do.

> 
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> 
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: James Morse <james.morse@arm.com>
>> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Cc: Marc Zyngier <maz@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: linux-kernel@vger.kernel.org
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>>   arch/arm64/kernel/cpufeature.c | 1 -
>>   1 file changed, 1 deletion(-)
>>
>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
>> index 2726bd6441da..a8ded1f0eeaf 100644
>> --- a/arch/arm64/kernel/cpufeature.c
>> +++ b/arch/arm64/kernel/cpufeature.c
>> @@ -374,7 +374,6 @@ static const struct arm64_ftr_bits ftr_id_pfr2[] = {
>>   };
>>     static const struct arm64_ftr_bits ftr_id_dfr0[] = {
>> -    ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 28, 4, 0),
>>       S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 24, 4, 0xf),    /* PerfMon */
>>       ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0),
>>       ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 16, 4, 0),
>>
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
Will Deacon April 9, 2020, 12:53 p.m. UTC | #3
On Fri, Mar 20, 2020 at 06:19:21PM +0000, Suzuki K Poulose wrote:
> On 01/28/2020 12:39 PM, Anshuman Khandual wrote:
> > ID_DFR0 based TraceFilt feature should not be exposed.
> 
> ... to guests.
> 
>  Hence lets drop it.
> 
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

Hmm, doesn't dropping cause it to become NONSTRICT? In general, I'd prefer
that we list all fields in these tables, rather than have implicit behaviour
in their absence.

Will
Anshuman Khandual April 13, 2020, 3:39 a.m. UTC | #4
On 04/09/2020 06:23 PM, Will Deacon wrote:
> On Fri, Mar 20, 2020 at 06:19:21PM +0000, Suzuki K Poulose wrote:
>> On 01/28/2020 12:39 PM, Anshuman Khandual wrote:
>>> ID_DFR0 based TraceFilt feature should not be exposed.
>>
>> ... to guests.
>>
>>  Hence lets drop it.
>>
>> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> 
> Hmm, doesn't dropping cause it to become NONSTRICT? In general, I'd prefer
> that we list all fields in these tables, rather than have implicit behaviour
> in their absence.

Just trying to understand, so we should just leave it unchanged.

ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 28, 4, 0)

> 
> Will
>
diff mbox series

Patch

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 2726bd6441da..a8ded1f0eeaf 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -374,7 +374,6 @@  static const struct arm64_ftr_bits ftr_id_pfr2[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_dfr0[] = {
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 28, 4, 0),
 	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 24, 4, 0xf),	/* PerfMon */
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 16, 4, 0),